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Srio communication failed between 2 same boards!!!!!

Other Parts Discussed in Thread: TMS320C6678

Hi,

I used my own designed board with two DSPs (tms320c6678) and one CPLD on it. When I set up a SRIO communication between the DSPs of such two same boards, the connection could be set up with SRIO 5G bps, but data couldn't be sent correctly, the program got stuck at the fuction "Keystone_SRIO_wait_LSU_completion(...)". Would you please help analyze the problem and give me some advice? Thanks!

  • Hi,
    Please refer below thread which discusses about similar issue,
    e2e.ti.com/.../959993
    Thank you.
  • Hi,

    Have you using TI provide SRIO example for your testing? If yes, please share the example path. Also share your SRIO lane configuration detail.

    Two DSP's SRIO ports are connected directly or connected via SRIO switch.

    Thanks,
  • 1. Our project was revised from the example provided by TI, and it can work correctly between 2 DSPs on one board.
    2. The same project failed between DSPs on 2 boards. The 2 boards connect through connector.
    3. What difference between inter boards and inner board communication should we concern?
    Would you please help analyze the problem and give me some advice? Thanks!
  • 1. Our project was revised from the example provided by TI, and it can work correctly between 2 DSPs on one board.
    2. The same project failed between DSPs on 2 boards. The 2 boards connect through connector.
    3. What difference between inter boards and inner board communication should we concern?
    Would you please help analyze the problem and give me some advice? Thanks!
  • Hi,

    Please share the MCSDK SRIO example path. Also share your SRIO lane configuration detail.(1x, 2x or 4x mode).

    What type of connector using to connect two DSP's? Eg: AMC

    For my understanding, the SRIO link is not stable on your non working boards, that only DSP wait for LSU completion. I am not sure what is the problem on your hardware setup.

    Thanks,
  • Hi,Here is my SRIO lane configuration detail:


    serdes_cfg.commonSetup.inputRefClock_MHz = 156.25;
    srio_cfg.blockEn.bBLK1_LSU_EN= 1;

    srio_cfg.blockEn.bBLK2_MAU_EN= 1;
    srio_cfg.blockEn.bBLK3_TXU_EN= 1;

    srio_cfg.blockEn.bBLK4_RXU_EN= 1;
    srio_cfg.loopback_mode=SRIO_NO_LOOPBACK;
    srio_cfg.device_ID_routing_config= dsp0_device_ID_routing_config;
    srio_cfg.uiNumDeviceId=
           sizeof(dsp0_device_ID_routing_config)/sizeof(SRIO_Device_ID_Routing_Config);
    serdes_cfg.commonSetup.loopBandwidth= SERDES_PLL_LOOP_BAND_MID;
    srio_cfg.serdes_cfg= &serdes_cfg;


    serdesLinkSetup.txOutputSwing = 10; /*0~15 represents between 100 and 850 mVdfpp */
    serdesLinkSetup.testPattern = SERDES_TEST_DISABLED;
    serdesLinkSetup.rxAlign = SERDES_RX_COMMA_ALIGNMENT_ENABLE;
    serdesLinkSetup.rxInvertPolarity = SERDES_RX_NORMAL_POLARITY;
    serdesLinkSetup.rxTermination = SERDES_RX_TERM_COMMON_POINT_AC_COUPLE;
    serdesLinkSetup.rxEqualizerConfig= SERDES_RX_EQ_ADAPTIVE;
    serdesLinkSetup.rxCDR = SERDES_RX_CDR_1;
    serdesLinkSetup.txInvertPolarity = SERDES_TX_PAIR_NORMAL_POLARITY;


    msg_cfg.message_map = DSP0_message_map;msg_cfg.uiNumMessageMap=
    sizeof(DSP0_message_map)/sizeof(SRIO_RX_Message_Map);
    msg_cfg.TX_Queue_Sch_Info= TX_Queue_Sch_Info;msg_cfg.uiNumTxQueue =
    sizeof(TX_Queue_Sch_Info)/sizeof(SRIO_TX_Queue_Sch_Info);
    msg_cfg.rx_size_error_garbage_Q = SRIO_RX_SIZE_ERROR_GARBAGE_Q ;
    msg_cfg.rx_timeout_garbage_Q = SRIO_RX_TIMEOUT_GARBAGE_Q ;
    msg_cfg.tx_excessive_retries_garbage_Q = SRIO_TX_EXCESSIVE_RETRIES_GARBAGE_Q;
    msg_cfg.tx_error_garbage_Q = SRIO_TX_ERROR_GARBAGE_Q ;
    msg_cfg.tx_size_error_garbage_Q = SRIO_TX_SIZE_ERROR_GARBAGE_Q ;
    msg_cfg.datastreaming_cfg= NULL; /*use default values*/
    srio_cfg.msg_cfg= &msg_cfg;


    serdesLinkSetup.linkSpeed_GHz= SRIO_DEFAULT_TEST_SPEED;
    srio_cfg.srio_1x2x4x_path_control= SRIO_PATH_CTL_1xLaneA_1xLaneB_1xLaneC_1xLaneD;
    srio_identify_used_ports_lanes(srio_cfg.srio_1x2x4x_path_control);
    /*On Turbo Nyquist EVM only lane 2 and 3 are connected between 2 DSPs*/
    srio_cfg.blockEn.bLogic_Port_EN[0]= TRUE;
    srio_cfg.blockEn.bLogic_Port_EN[1]= FALSE;
    srio_cfg.blockEn.bLogic_Port_EN[2]= FALSE;
    srio_cfg.blockEn.bLogic_Port_EN[3]= FALSE; Keystone_SRIO_Init(&srio_cfg);
    And we use a connector QMS-026-05.75-L-D-PC4 not like AMC.
    Thank you for more suggestion.