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Keystone II u-boot with 32-bit DDR3

Other Parts Discussed in Thread: 66AK2H12

Hi,


I checked out

git.ti.com/.../92fa7f53f1f3f03296f8ffb14bdf1baefab83368

(Release 2015.1) as a baseline to build u-boot for 66AK2H12.

My custom board has 32-bit DDR3A and 32-bit DDR3B interfaces (no ECC).

SPRABX7 "Keystone II DDR3 Initialization" tells that PHY registers DX4GCR .. DX8GCR bit 0 need to be cleared. I tried to find those registers from the source tree, with no success.

1. What is the general procedure to adjust u-boot to fit custom board's DDR3 settings ?

2. Are there available any examples of 32-bit DDR3 for KS2 u-boot ?

3. The project is initialized with

make k2hk_evm_defconfig

and then the source files are edited. Is this a proper way to achieve target?


BR, -Topi

  • Hi Topi,
    Please do not duplicate threads for same issue. It is very difficult to track and close it.

    1. My understanding is that, you can initialize and test the DDR using gel file first then the same values can be used in u-boot. The gel file is part of MCSDK3.x directories. Please find the MCSDK3.x and user guide below my signature.

    2. The KS2 u-boot has the DDR3 initialization values that matches the K2H EVM's. For custom board, you can update the init values on u-boot based on gel file testing. (Point no 1)

    3. Update the source then do menu config and build. Please refer MCSDK explore wiki for more detailed steps.
    processors.wiki.ti.com/.../MCSDK_UG_Chapter_Exploring

    Thank you.