Can the TMS320C6657 be directly interfaced with a 500MHz DDR LVDS continuous output

Dave Cornall

Other Parts Discussed in Thread: TMS320C6657

I have a question regarding the RapidIO (SRIO) and McBSP.

We have a new product under development that will use a high speed 14 bit A/D device with an LVDS output running at 910 Mbps with double data rate clock and frame clock outputs (500 MHz bandwith). The A/D will run continuously, but we will capture the data in 1k blocks at particular intervals.

We would like to use the TMS320C6657 in this application, however we don't think it will work using a direct connection. I've never used the SRIO or McBSP TI interfaces before, but I thought maybe they'll be suitable (might require a level translation?). However, after studying the specs we don't believe they are suitable for this continuous data stream.

At this point we're leaning towards the TigerSharc because it has the Link Ports which are perfect for capturing the data directly. Our first choice is still TI (as always) so before we go this route I want to make sure I've understood the high speed serial interface specs correctly. I believe RapidIO is a packet based methodology and not suited to a raw continous data stream and McBSP is too slow.

My question is: Can the TMS320C6657 be directly interfaced with a 500MHz DDR LVDS output and/or does TI have an alternative DSP that will work?

over 8 years ago

0 Senthilkumar Srinivasan over 8 years ago

TI__Mastermind 43660 points

Hello Dave,

Welcome to the TI E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages (for processor issues). Be sure to search those for helpful information and to browse for the questions others may have asked on similar topics (e2e.ti.com).

You cannot interface high speed ADC directly into the C6657 device. You need to have a FPGA in between them, ADC and FPGA would be interfaced through LVDS and C6657 and FPGA would be interfaced through SRIO.

Rather you can check the device TCI6630K2L DSP + ARM device available with a JESD204B interface that might be interesting.

http://www.ti.com/product/tci6630k2l?keyMatch=tci6630k2l

Regards,

Senthil

0 Dave Cornall over 8 years ago in reply to Senthilkumar Srinivasan

Prodigy 40 points

Hi, Senthil.

Thank you for the answer. That is exactly what I needed to know.

We are trying to avoid an FPGA interface with our new design if possible, but we understand it may be necessary.

I am interested in the alternative you suggested, but I can't find the power consumption information. Are you able to direct me to the power requirement specs for this device or, better yet, a spreadsheet calculator. I suspect the power requirements will be too high for our application (which is too bad because we could do a lot with a chip like that!).

Thanks again.

Best regards,

Dave

0 Senthilkumar Srinivasan over 8 years ago in reply to Dave Cornall

TI__Mastermind 43660 points

Hello Dave,

The power consumption model for TCI6630K2L is not yet released. However a preliminary version might be available. I will check with the team and update you.

Regards,
Senthil

0 Dave Cornall over 8 years ago in reply to Senthilkumar Srinivasan

Prodigy 40 points

Thanks, Senthil.

0 Senthilkumar Srinivasan over 8 years ago in reply to Dave Cornall

TI__Mastermind 43660 points

Hello Dave,

We have a preliminary version that has been shared with customer under NDA. Usually it is routed out via the marketing folks. So i would suggest you to contact the local FAE or BDM to get this in hand.

Regards,

Senthil

0 Dave Cornall over 8 years ago in reply to Senthilkumar Srinivasan

Prodigy 40 points

OK. Thanks for the follow up, Senthil.

We've looked into this further during this last week and concluded an FPGA is necessary anyway. Too bad it would have been slick the other way.

Best regards,

Dave

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Can the TMS320C6657 be directly interfaced with a 500MHz DDR LVDS continuous output