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Minimum clocking requirements to boot TCI6636K2H

Martin Fogarty
Prodigy 50 points
Other Parts Discussed in Thread: TCI6636K2H

Hi,

We are currently trying to integrate the TCI6636K2H into our product architecture. One thing that is not entirely clear is what is the minimum number of input clocks that must be in place and active to allow the processor to bootload. Ideally with would like to hardwire these clocks and then have the processor itself configure the remainder. Section 3.6 of this document

http://www.ti.com/lit/an/sprabv0/sprabv0.pdf

provides some information but it is not clear which clocks would be mandatory to allow the SPI interface to the NOR flash to function and hence (I assume) the bootloader to be invoked. If anyone could point me to the appropriate document(s) or who could provide guidance based on their own experience, it would be appreciated.

Martin

  • 0
    TI__Genius 17676 points

    Hi Martin,

    the clock tree is described in the datasheet in section 10.5

    Basically SPI is using SYSCLK1 which is derived from SYSCLK.

    Kind regards,

    one and zero

  • 0 in reply to one and zero
    TI__Guru* 81335 points

    Welcome to the TI E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages (for processor issues). Be sure to search those for helpful information and to browse for the questions others may have asked on similar topics (e2e.ti.com). Please refer all the links below my signature. Thank you.

  • 0 in reply to one and zero
    Prodigy 50 points
    Hi,

    Thanks for the quick response. So would it be true to say that if we can supply just the sysclk and arm clk to the chip, we should be able to do an initial boot of the arm processor from the SPI NOR Flash? We are looking at options where an arm processor takes care of initialising the remainder of the external clocks etc. on our board.

    Regards

    martin
  • 0 in reply to Martin Fogarty
    TI__Genius 17676 points
    Hi Martin,

    yes, but depending on which peripherals/memory you use the clock sequencing requirements must be met.
    As stated in the Hardware Design Guide for KeyStone II Devices. Table 10 shows the requirements for input clocks to the KeyStone II device. Time frames indicated are minimum. Maximum timeframes are defined in the data manual
    and shall not be violated. (See the device-specific data manual for specific timing
    requirements.)

    Kind regards,
    one and zero
  • 0 in reply to Martin Fogarty
    TI__Mastermind 43660 points
    Hello Martin,

    Yes, the SYSCLK and ARMCLK are enough to boot the processor from SPI NOR FLASH. The other input clock sources may or may not required depending on your requirement. If you are using DDR3 for your booting process, you may need to source the DDR3 PLL. Like wise you need to decide on other peripheral clocks.

    As one and zero mentioned above, you need to adhere to the clocking requirements given in the hardware design guide as well.

    Regards,
    Senthil
  • 0 in reply to Senthilkumar Srinivasan
    Prodigy 50 points

    Thanks Senthil. We don't require access to the DDR3 intiially so those two clocks will suffice as you say.