Hi, everyone,
We are trying to run the TMS320C6670 at 1200 MHz CPU frequency. We are using pdk_C6670_1_1_2_6 and we found couple of bugs in the platform_init() routine.
1) one of the arguments of the platform_init() function is the structure platform_init_config. But the thing is that only the pllm and mastercore are usable parameters. All dividers don't change anything, which make the frequency process adjustment very annoying.
2) in the prog_pll1_values function on the line 92 BWADJ value calculated incorrectly:
temp = ((hwSetup->pllM + 1)>> 1) - 1;
According to the data manual, BWADJ parameter is half of PLLM rounded down. For instance, we are trying to set PLLM=624 and PLLD=31 as n Table 2-13 of the data manual. With input clock 122.88 MHz and output divider enabled that gives 122.88*(624+1)/2/(31+1)=1200 MHz. If so, BWADJ=PLLM/2 should be 624/2=312. Above formula calculates it wrong to 311.
We don't need to subtract 1, because we do that in the platform init function on the line's 383-384:
pllc_hwSetup.pllM =
(((p_config->pllm) ? p_config->pllm : PLATFORM_PLL1_PLLM_val) - 1);
Just in case, prog_pll1_values() functions does violate prescribed sequence of PLLM programming. According to the data manual, upper [12:6] bits of PLLM should be written to MAINPLLCTL0 before programming lower [5:0] bits of PLLM to PLLM register.
3) the CorePllcGetHwSetup function working just incorrectly, because on the line 291:
hwSetup->preDiv = PREDIV_REG;
and if we go to the platform_internal.h:
#define PREDIV_REG (*((volatile uint32_t *) 0x02310114))
So the thing is that in the Data manual it's said that 0x02310114 is a Reserved address, but not the address of the preDiv. We check that, and we notice that it's has value of 0, no matter what preDiv you establish.
Moreover, the value of PLLM is read incorrectly here. PLLM is split in two fields, bits [5:0] read from PLLM control register of the PLL controller, while its upper [12:6] bits have to be read from MAINPLLCTL0. This read and bitfields merger are not performed in the mentioned function, so just 6 LSbs are returned, not real PLLM.
That is why the platform_get_frequency () function calculating the wrong frequency value, and ONLY in the case of default preDiv (which is 1) it's working correctly.
I wonder if TI has any idea, how the customer should cope with those troubles. Is there any solution to deal with all of that without make changes into the library? I doubt that all my company members would be happy to change in on their PC, especially every new PDK version will be released.
Best Regards,
Pavlo!