In dsp boot mode, dsp core pll is configurable at GEL file by editing 'Set_Pll1(n)' function which writes to MAIL_PLL_CTRL0 register.
but i couldn't find the way where i can set dsp core's pll in arm boot mode. because gel script can't be done in that mode.
i found a document for keystone main pll clocks binding, the file name is as follows.
linux-keystone/Documentation/devicetree/bindings/clock/clk-keystone-pll.txt
however, i couldn't find proper value for configuring dsp core pll 983 to 1.2GHz.
and I'm uncertain this part has something to do with setting dsp pll in arm boot mode.
how i can set dsp core clock to 1.2 GHz in arm boot mode?
