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PCIe Ref clock is not generated

Abdul Basit2
Intellectual 510 points
Other Parts Discussed in Thread: CDCE62005, TMDXEVMPCI, CDCM6208

Hi,

I am using EVMK2H. I am able to test PCIe example for EVMK2H by using custom PCIe adapter card. The example code runs fine and test is passed. Then I tried to test EVMK2H(RC) PCIe with FPGA(AC701 EP) , but evmk2h is not detecting FPGA as EP. I checked PCIE REFCLK with oscilloscope and there was no clock coming out of evmk2h. Then I checked REFCLK with PCIE example setup ( evmk2h_RC -> evmk2h_EP) again I didn't see any clock on oscilloscope but the test was passed and link was up for example design. Is it a correct behavior?

Regards

Abdul Basit 

  • 0
    TI__Mastermind 43660 points
    Hello Abdul,

    I think your probing point for PCIe reference clock is not correct on the EVM. There are two inputs available for the SoC PCIe reference clock in the EVM, one is from the AMC card and another is from the on board clock generator (CDCE62005) which is 100MHz. Please refer the EVM schematics and try to probe at correct location.

    When you are using EVMK2H as RC and FPGA as EP, you need to ensure the EP device has its own PCIe reference clock since our EVM does not have output reference clock to EP device.

    Regards,
    Senthil
  • 0
    TI__Mastermind 28085 points

    Hi,

    Yes, FPGA (EP) device need own PCIe reference clock for enumeration, since our EVMK2H does not have output reference clock to EP device. See the below clock domain image:

    Thanks,

  • 0 in reply to Ganapathi Dhandapani95
    Intellectual 510 points

    I have tried to provide FPGA with on board clock But couldn't get link up messages. Then I set Rx_loss to zero and this time I get the message of link up at EVMK2H side. But I observed that FPGA side is still stuck in poll_config state. It is very strange to me that EVMK2H(RC) indicating that link is established and FPGA(EP) is stuck at Poll_config. Why PCIe is behaving like this?

    To Dig further the issue of common clock. I tried to check the behavior of EVMK2H and TMS6678 with common clock. I enabled Common clock in 6678(EP) by writing 1 to common clcok bit of LinkStatCtrl register and connected it with EVMK2H(RC). As there is no ref clock coming out of evmk2h for EP, but I observed the message on console "Link is up". what can cause that? 



    Regards
    Abdul Basit

  • 0 in reply to Abdul Basit2
    TI__Mastermind 28085 points
    Hi,

    Have you running TI provide MCSDK PCIe example code on EVMK2H to initialize as RC? This example code only works on two EVMs only.

    TI doesn’t provide PCIE RC enumeration example/driver source. Normally the RC runs some operating system that performs the enumeration.

    In the MCSDK PCIe sample example, two DSP EVMs are used to test the PCIe driver. DSP 1 is configured as a Root Complex and DSP 2 is configured as End Point. Each DSP configure the PCIe register it self with test application code. Once the PCIe link is established, the following sequence of actions will happen:
    1. DSP 1 sends data to DSP 2 - DSP 2 waits to receive all the data
    2. DSP 2 sends the data back to DSP 1
    3. DSP 1 waits to receive all the data
    4. DSP 1 verifies if the received data matches the sent data and declares test pass or fail.

    Thanks,
  • 0 in reply to Ganapathi Dhandapani95
    Intellectual 510 points
    Yes I am using the same example.
    I am encountering multiple issues with PCIe. If it is possible to setup a debug session with pcie expert from your side please let me know. Here is another issue :
    When I plug in the EVM6678 ( switch setting PCIe boot, No sys bios code is loaded through CCS) into Workstation( Intel core i5 with fedora 18) , After booting up workstation when I press lspci I see Texas instrument PCIe EP. But when in same setting I replace workstation with EVMk2H i.e. EVMK2H(RC)->EVM6678(EP), after bootup of linux on EVMK2H, lspci doesn't indicate any device. Ideally it should show the Texas PCIe device. But when I set switch settings to "No boot" on EVM6678 and load PCIe end point example on EVM6678, after rebooting EVMK2H I am able to see Texas PCIe device.
    This is hay-wired for me right now. I couldn't comprehend that why evmk2h is not detecting EVM6678 when pcie bootmode is selected on EVM6678 but detects the pcie when evm6678 is running sys/bios example code?

    Regards
    Abdul Basit
  • 0 in reply to Abdul Basit2
    TI__Mastermind 28085 points
    Hi,

    Have you connect one EVMC6678 and one K2H EVM together through BOC card?

    Some initialization steps are differ from PCIe ROM boot mode and PDK example code. I think it does not effect the PCIe enumeration, please try to read the DEBUG0 register on C6678 at PCIe boot mode.

    The LTSSM_STATE field (bits [4:0]) in DEBUG0 register (0x21801728) to show the status of the PCIe link. It will not be 0x11 if the link is disconnected. Please see PCIE user guide Appendix A.1 for the names of the LTSSM states corresponding to the encoded values.

    Take a look at below PCIe FAQ wiki link:
    processors.wiki.ti.com/.../PCI_Express_%28PCIe%29_Resource_Wiki_for_Keystone_Devices

    Thanks,
  • 0 in reply to Abdul Basit2
    TI__Mastermind 42545 points
    Hi Abdul,
    The 100MHz reference clock is a requirement for PCIE connectors but it is not part of the PCIE specification. The EVMK2H does not include a PCIE connector so no 100MHz PCIE reference clock in included. PCIE does not require a common clock be used by both the root-complex and the endpoint unless spread spectrum clocking is used. This will allow you to connect your EVMK2H to your FPGA board if the FPGA board has an on-board reference clock. The problem is that many boards are built to be installed on a PCIE backplane and are designed to use the connector 100MHz reference clock. If your FPGA board doesn't have a solution for the reference clock you would need to design a solution that would provided that clock.
    Regards,
    Bill
  • 0 in reply to Bill Taboada
    Intellectual 510 points
    Thanks Bil for clearing that.
    I am using AC701 as EP and it indicates in PCIe user guide (7-series) that AC701 supports Asynchronous clocking mode.

    www.xilinx.com/.../pg054-7series-pcie.pdf

    So I think it should work with the evmk2h ( obviously after changing some parameters e.g. CFGLINKCONTROLCOMMONCLOCK and pcie_async_en in Xilinx IP). I am able to detect AC701 as endpoint in my workstation.

    Why didn't you people connected 100 MHz ref_clock to AMC header or RTM , Knowing that pcie interface will be used in evmk2h as RC and many available PCIe IP does need common refclock.

    Regards
    Abdul Basit
  • 0 in reply to Ganapathi Dhandapani95
    Intellectual 510 points
    Hi Ganapathi,
    I am using custom made AMC to pcie adapter card on EVMK2H and TMDXEVMPCI on EVM6678. They are connected through PCIe cable. I am able to test sys/bios examples EVMK2H(RC) --> EVM6678(EP), EVMK2H(RC)-->EVMK2H(EP) on my current settings successfully. Also I am able to see the enumeration of EVM6678( running sys/bios example) in linux 3.10 running on EVMK2H as I mentioned earlier.
    I tried to read through memory browser by entering address 0x21801728. the last 2 hex are 06 which detect_wait.

    Regards
  • 0 in reply to Abdul Basit2
    TI__Mastermind 42545 points

    Hi Abdul,

    Remember that the PCIE spec doesn't require a shared clock and doesn't specify that the RC provide a 100MHz reference clock. The PCIE card electromechanical spec specifies that the PCIE backplane connector include a 100MHz reference clock but we don't have that connector on EVMK2H. Including a 100MHz reference clock on the AMC connectors wasn't practical. The advantage of including the PCIE on the AMC was to allow multiple EVMs to communicate over the AMC backplane. There wasn't a practical way of defining which of these two cards was the RC and would drive the reference clock and which was the EP and would receive the reference clock. Since PCIE didn't require a common clock, we didn't include it.

    Regards,

    Bill

  • 0 in reply to Bill Taboada
    Intellectual 510 points

    Thanks Bill,

    That is very helpful. Consider this if I pick up PCIe clock from CDCM62008 output and connect it to FPGA PCIe clock, Will that be a viable solution?

    P.S Ganapathi please help me out in enumeration issue of EVM6678 on EVMK2H.

    Regards

  • 0 in reply to Abdul Basit2
    Intellectual 510 points
    Any response guys ??
  • 0 in reply to Abdul Basit2
    TI__Mastermind 42545 points

    Hi Abdul,

    I'm not sure what you mean by picking up the PCIE clock from the CDCM6208. The PCIE reference clock has pretty strict jitter requirements so connecting the clock using blue wires may not be successful. In addition, you would have to reprogram the CDCM6208 to provide the 100MHz clock on an unused output. Remember that the clock connections are point-to-point. You can't connect wires to a clock output that is being used for a different purpose. 

    Regards, 

    Bill

  • 0 in reply to Bill Taboada
    Intellectual 510 points

    Thanks Bill,
    By picking up PCIe clock I meant connect the PCIe clock (differential pair) to pair of wires and pass them through a buffer. The output of buffer is connected to AMC Header of adapter card whose clock pins are connected to PCIe finger on card. So bottom line is there is no way to get refclk to AMCtoPCIe adapter. Am i assuming it right? 

    Regards