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EVMK2H memory partitioning using 4GB RAM on the ARM bootmode.

Gilbert-Kim
Intellectual 350 points

I'm gonna run two applications (ARMv7, C66) on the EVMK2H mounting 4GB RAM.
I don't quiet understand about LPAE.

According to above MCSDK wiki (Using more than 2GB of DDR3A memory),
U-boot creates two memory banks when mem_lpae=1, mem_reserve=512M and ddr3a_size=4 or 8,
but I don't know starting address of DSP side memory.

memory {
reg = <0x00000008 0x00000000 0x00000000 0x60000000
0x00000008 0x80000000 0x00000001 0x80000000>;
};

In this case, ARM Linux uses 1.5GB of first 2GB bank.
At this time, what is the range of address that DSP can access?
I don't know a meaning of this.

The second bank represent the remaining memory.
That memory starts at the fixed address and size equal "ddr3a_size - 2".

What I ultimately want is to split DDR3A memory independently,
and to utilize known memory except ARM occupied for running DSP application on 4GB RAM.

Gilbert.

  • 0
    TI__Guru** 116100 points

    Hi,

    This is the memory map for keystone devices for DDR3A.

    You can use DDR3B (Only K2H) completely for DSP.

    Let me know if any further questions.

    Please refer to the following TI wiki page for running DSP app on K2 devices.

    processors.wiki.ti.com/.../MCSDK_Image_Processing_Demonstration_Guide

  • 0 in reply to Titusrathinaraj Stalin
    Intellectual 350 points

    You can use DDR3B (Only K2H) completely for DSP.

    You mean that DSP should use only DDR3B memory when K2H mounted 4GB memory?

    As possible, DDR3B  should not be used by ARM and DSP.

    Because DDR3B has no DMA coherency and only 512 MB (0x6000_0000 to 0x7FFF_FFFF)

    I would like to find starting address and range which DSP application can access.

    See above picture you uploaded, SoC mapped to DDR3A memory whose size is 2GB,

    So I got confused because I don't know how to access to mem_reserve region by 32-bit memory addressing in case of using more than 2GB of DDR3A memory due to overflowing maximum address range.

    According to MCSDK wiki, "A customer has to modify the u-boot ft_board_setup() function for reserving memory at the second bank."

    It is required to modify U-boot function in order to get mem_reserve more than 2GB?

    I want to divide 4GB into ARM(1GB) and DSP(3GB).

    Gilbert.

  • 0 in reply to Gilbert-Kim
    TI__Guru** 116100 points

    Hi,

    Titus said:

    You can use DDR3B (Only K2H) completely for DSP.

    I meant that you can use DDR3B when you use DSP alone and not when you have Linux.


    You mean that DSP should use only DDR3B memory when K2H mounted 4GB memory?


    No, Linux uses DDR3A only and part of DDR3A can be accessed for DSP as mentioned in wiki.
    You can also see the uploaded picture in my previous reply, Linux won't use DDR3B at all, never captured.
    If you are using DSP alone, you can access the DDR3B memory through *.cfg or linker command file.


    So I got confused because I don't know how to access to mem_reserve region by 32-bit memory addressing in case of using more than 2GB of DDR3A memory due to overflowing maximum address range.

    That's where, LPAE bit would play that role. Please check the picture carefully that I uploaded in my earlier reply.

    If you use more than 2GB DDR3A (2GB<) then you have to set LPAE bit (LPAE=1) to have the address in 40bit mode.

    LPAE=0
    0x8000 0000 to 0xFFFF FFFF (2GB)

    LPAE=1
    0x8 0000 0000 to 0x9 FFFF FFFF (8GB)

    Last 512MB used for DSP.

    Please refer to the memory map of K2H, page no 93 and 94.


    I want to divide 4GB into ARM(1GB) and DSP(3GB).

    Your requirement is, you want to use 1G for ARM and rest of the memory (3G) for DSP ?

    Let me calculate and update in next reply.

  • 0 in reply to Titusrathinaraj Stalin
    Intellectual 350 points

    Titus, Thanks for your detailed reply.

    Yes. I hope you calculate LPAE for accessing to memory(3G) from DSP side.

    Gilbert.

  • 0 in reply to Gilbert-Kim
    Intellectual 350 points
    Titus S.
    Please update this thread. I'm waiting for your reply.

    Gilbert.
  • 0 in reply to Gilbert-Kim
    TI__Guru** 116100 points

    Hi,
    I'm experimenting with K2H board and checking with internal team, so I get back to you as soon as possible.
    I hope, we have to tweak the "mem_reserve_head" and "mem_reserve" u-boot variables and dts file changes to meet your requirement.

  • 0
    Intellectual 350 points
    Titus S.
    Is there any update about this issue?
    I'm looking forward your reply.

    Gilbert.