When is the BOOTCOMPLETE asserted?

Hi Senthil,

You mean the assertion of BOOTCOMPLETE pin does not need exteral boot code, right?

Then, what are the conditions of the assertion?

I'm in evaluation of our C6657 custom hardware board.

Currently, power on sequence has been verified and /RESETSTAT pin was deasserted (high).

But the BOOTCOMPLETE pin is still low.

Would you let me know the next step?

I would like to verify the C5567 and populated memories (SPI, I2C, DDR3 and NAND flash).

I designed the memory system based on the EVM board (TMDXEVM6657LS) for easy start up.

By the way, for your reference, when I try to connect to the core of the board with CCS, it looks successful as following screen shot.

Thanks.

JK

I performed additional tests.

I loaded helloWorld example to C66xx_0 after installing MCSDK.

The C66xx_0 looked loading and running the example successfully. But the BOOTCOMPLETE was still low.

And I inputed 0x80015614 to memory browser. It looked showing the memory contents.

By the way, CCS outputs the error messages in red.

Please let me know what was wrong.

I enclosed the gel file that I used and screen shot for your reference.

The gel file I used was modified from the original CCS provided because my custom board has different clock circurity from EVM.

/cfs-file/__key/communityserver-discussions-components-files/791/1682.3858.evmc6657l.gel

Hello Senthil,

When I read the BOOTCMPLETE(0x0262013C) register, it shows all zero as following screen shot.

I have read almost threads related with BOOTCOMPLETE including you indicated.

The threads are saying only hardware can pull high the BOOTCOMPLETE, right? But I couldn't find anything wrong in my board.

My troubles are:

1. BOOTCOMPLETE pin is not going to high.

2. When I try to read memory mapped address, the red error message which I previously indicated is shown. This message has been shown when I read BOOTCMPLETE register as well. So I'm not sure if it is correct value.

I'm not sure the troubles have relationship with each other.

Because I'm a hardware engineer and it is my first time to use CCS, maybe it is due to missed configuration, I guess. Please help me.

Hello Senthil,

Is there any update?

I think the memory browser is working correctly. But I don't know the reason of the error message and if it has relationship with BOOTCOMPLETE.

I guess it is due to configuration problem. Please take a look the gel file I enclosed previously and let me know step-by-step procedure to connect to the target core and anything I can try.

Thanks.

Hello Senthil,

1. After resuming the core (click resume button), the status of the core changed from "suspend" to "running" and I could access memory addresses without error messages. Is my method correct?

2. I though RBL booting can be completed without IBL and application code. But I found the condition of setting BOOTCOMPLETE register is all corepac gets BOOT_MAGIC_ADDRESS and the corepac can get the BOOT_MAGIC_ADDRESS by application code. It means BOOTCOMPLETE will not be high without application code. Am I correct?

I found these from

https://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/162509/653246#653246

sprugy5c  document

3. By the way, when I access (memory mapped) register, there are still errors while core registers look fine. At that time, "view memory at address" menu shows the register in the memory browser. Please refer to following screen shot. Would you let me know what I need to know to see registers in the register view?

1. After resuming the core (click resume button), the status of the core changed from "suspend" to "running" and I could access memory addresses without error messages. Is my method correct?
3. By the way, when I access (memory mapped) register, there are still errors while core registers look fine. At that time, "view memory at address" menu shows the register in the memory browser. Please refer to following screen shot. Would you let me know what I need to know to see registers in the register view?

2. I though RBL booting can be completed without IBL and application code. But I found the condition of setting BOOTCOMPLETE register is all corepac gets BOOT_MAGIC_ADDRESS and the corepac can get the BOOT_MAGIC_ADDRESS by application code. It means BOOTCOMPLETE will not be high without application code. Am I correct?

Hi,

I have successfully read the memory address via memory browser and register field also show the same values at suspend state. Run time time only i got the unable to read error message on register field. See my below screen shots.

Suspend state:

Run state:

Thanks,