C6678 PCIe RootComplex Address Translation of INBOUND

Hi,

Is it possible to use 32-bit and 64-bit addresssing mode together for INBOUND address translation?

Yes, It is possible to use 32-bit and 64-bit addressing mode together for INBOUND address translation.

In 64-bit addressing, a pair of adjacent BARs concatenated is required to hold the 64-bit address. This means BAR0 and BAR1 will hold 64-bit address with BAR0 holding the lower 32-bit address to match while BAR1 holding the higher 32-bit address to match. And BARs[0-1] will be dedicated to Address Space 0. The same holds for Address Space 1 association. BARs[2-3] and BARs[4-5] will hold the accepted 64-bit address that will be associated to Address Space 1 where mapping takes place via the use of Regions[0-3].

Address translation for Address Space 0 does not exist because the internal location is unique and is contiguous. All is needed is that the PCIe address within the received TLP address matches BAR0 for 32-bit addressing, and BAR0, BAR1 for 64-bit addressing.

C6678 (root complex) are communicating with FPGA(Endpoint) via PCIe. It seem that LinkUp is done, but can't Read/Write against memory space. The mapped memory space are all zero and doesn't update. Write access is also not availabe. In such case, does this mean that configuration of address translation is wrong? LinkUp is done(LTSSM[4:0]=0x11) so that I guess signal integrity is fine.

Yes, the address translation is wrong. Refer 64-bit Inbound/Outbound Address Translation example on PCIe user guide.
www.ti.com/.../sprugs6d.pdf

Thanks,