Slave core triggering doesn't work with SYS/BIOS

Wonbo Jeon,

I built the srioboot_helloworld project (as you know, it doesn't use SYS/BIOS) with modifying that core 0 ~ core 3 turn on the LED.

I hope, you are able to wake up secondary cores without using the SYS/BIOS. Please confirm.

Thank you.

Thanks for your reply Raja.

I already was able to wake up the secondary cores without using the SYS/BIOS.

I don't know what is the difference between 2 cases.

My code is almost same as the srioboot_helloworld project that is provided by TI.

I set boot magic address and IPCGR write in main function before calling the BIOS_start().

Please give me more advices...

Thanks

srioboot_helloworld_with_BIOS.zipI attached the source file.

There is two version with and without BIOS.

I checked the operation of slave core by memory browser and It worked well.

core 0 : *((volatile short *)(0x80000000 + 0x0000)) = 0xABCD;

core 1 : *((volatile short *)(0x90000000 + 0x0000)) = 0xDCBA;

When I use the SYS/BIOS, core 1 isn't work.

Q. Is it necessary that I should use CACHE_InvL1d and CACHE_wbL1d to Interprocessor Communication ? 

Q. I think that Write the BOOT MAGIC ADDRESS and then Write the IPCGR is the right way to wake up the slave cores. Is it necessary to consider the Interrupt ? I think there is no need to set the IPC interrupt for IPCGR.

Q. In the above core, I changed DDR write to printf. And I found it doesn't work.

core 0 : *((volatile short *)(0x80000000 + 0x0000)) = 0xABCD; -> printf("Core 0...\n);

core 1 : *((volatile short *)(0x90000000 + 0x0000)) = 0xDCBA; -> printf("Core 1...\n);

Thanks.