We have a question on the MCBSP bus for C6655 and C6657 DSP.
We would like our MCBSP0 frame sync of 48KHz to synchronize on a signal that comes in from an external source connected to the pin of MCBSP1 frame sync, which is 1 Hz. The solution we came up with is to configure MCBSP1 frame sync as an interrupt-able GPIO pin, have the MCBSP0 frame sync synchronized on a certain timer, and adjust the frequency of this timer if it doesn't exactly match the 1-second duration.
I have read about the frame sync signals and leaned that they can be configured as interrupt driven. We normally derive the MCBSP0 frame sync from the BCLK signal, which is an 24.5MHz external clock in our design. I also read about the timers and how we can read their value at every 1 Hz from the external source to detect clock drifts.
What's still not clear for me is how to adjust the MCBSP0 frame sync once the clock drift is detected. We can possibly make the frame sync to be derived by the system clock, but I haven't found out how to make it go a bit slower or faster depending on the detected offset.
I wonder if you have an idea how we can achieve this. Any inputs would be appreciated. Thank you