Hi Champs,
I'd like to make sure of a reset value of KeyStone II DDR3 PGCR1 resister.
According to KeyStone II DDR3 U/G(SPRUHN7C) page 89~90, there are some differences of the reset values b/w Figure 4-36 and Table 4-38 as follows.
| Figure 4-36 | Table 4-38
-------------------+-------------+------------
Bits 25 PHYHRST | 0x1 | 0x0
Bits 6 WLSELT | 0x1 | 0x0
Bits 5-3 Reserved | 0x4 | 0x0
Bits 1 WLMODE | 0x0 | 0x1
----------------------------------------------
So, could you please let me know which PGCR1 reset value is correct?
Thank you in advance for your cooperation.
Best regards,
j-breeze