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6657 - SPI driver - CS1 for FPGA

Other Parts Discussed in Thread: TMDSEVM6657

Hi everyone,

I am developping SPI driver with evaluation board "TMDSEVM6657". in this board, a FPGA communicates with the DSP with the SPI (CS1).


To begin, i have tested the SPI driver with loopback mode. And everything works well.


Now, i am trying to send message to FPGA with CS1 on SPI driver. But it doesn't work.

I'm not sure i have configure well the chips select 1 (registers SPIPC0, SPIDAT1 and SPIDEF)

After running, i have the error 0x11 in INTVEC0 register (error interrupt pending). This error can append when the frequency is too high. So i have changeg the frequency. But nothing changes.

So i took a oscilloscope to observe SPI signal (CLK, CS1, MISO, MOSI). The CLK signal seems good. But CS1 stays in high level. It nevers goes to low level.

Can anyone explain me clearly how to configure register to select CS1 ? (I have read many posts in this forum but i don't find the answer). If anyone could print me the SPI register after configuration, i would be grateful.

Thanks

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  • You can mention the chip select while doing "spi_claim"

    C:\ti\pdk_c665x_2_0_0\packages\ti\platform\evmc6657l\platform_lib\src\evmc665x_spi.c
    SPI_STATUS
    spi_claim
    (
    uint32_t cs,
    uint32_t freq
    )

    Are you using "spi_claim" API to acquire the SPI with corresponding chip select ?

    C:\ti\pdk_c665x_2_0_0\packages\ti\platform\evmc6657l\platform_lib\src\evmc665x_fpga.c
    /* Open the SPI controller for FPGA */
    spi_claim(SPI_FPGA_CS, SPI_FPGA_MAX_FREQ);

    C:\ti\pdk_c665x_2_0_0\packages\ti\platform\evmc6657l\platform_lib\include\evmc665x_spi.h

    #define SPI_NOR_CS 0 /* SPI Chip Select number for NOR*/
    #define SPI_FPGA_CS 1 /* SPI Chip Select number for FPGA*/
    #define SPI_MODULE_CLK 166666666 /* SYSCLK7 = CPU_Clk/6 in HZ */
    #define SPI_MAX_FREQ 25000000 /* SPI Max frequency in Hz */
    #define SPI_NOR_CHAR_LENTH 8 /* Number of bits per SPI trasfered data element for NOR flash */
    #define SPI_FPGA_CHAR_LENTH 16 /* Number of bits per SPI trasfered data element for FPGA */
  • Dear Martin,
    Can you please share your project (DSP to FPGA communication over SPI) for loopback mode?
    I am having problems in this.

    Thanks & BRs,
    Hemraj