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Shared memory read with multicore 6670

Hello,

I am having troubles using the shared memory with TMSC6670 .

I am runnig a very simple code : I defined a variable "x" located in the shared memory (at address 0x0C008D14). Core0 sets x = 132.
After this, if I read the value of "x" from core0 I correctly read 132, but if I read it from core 1 I read 0.

Core0 does CACHE_wbInvL1d ((void *)x, 512, CACHE_WAIT) and CACHE_wbInvL2 ((void *)x, 512, CACHE_WAIT) after setting the value, core1 does
CACHE_invL1d((void *)x, 512, CACHE_WAIT) and CACHE_invL2 ((void *)x, 512, CACHE_WAIT) before reading it.

I  configured the shared memory as non-prefetchable (register MAR12 set to 0)

This is the code :


main(){

    coreNum = REG_READ32(L2_CFG_REG);
    coreNum = (coreNum>>16) & 0x0000000F;

    REG_WRITE32(MAR12_REG, 0);

    if (coreNum==0){
   
         x = 132;

        CACHE_wbInvL1d ((void *)x, 512, CACHE_WAIT);
        CACHE_wbInvL2 ((void *)x, 512, CACHE_WAIT);
    }

    CACHE_invL1d ((void *)x, 512, CACHE_WAIT);
    CACHE_invL2 ((void *)x, 512, CACHE_WAIT);
 
 
    -> here is where I stop the execution of the code and read the value of x using the window "expressions" of the code composer.
   
   
}  
  
  
Am I missing something?


Thanks,
Sara

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  • I am a little confused in what is x

    Is it a variable or a pointer to variable

    Here is what I suggest

    Define a pointer like int p_x

    Load it with the value that you want in MSMC memory or in DDR or anywhere

    Then load *p_x with the number "132"  (*p_x = 132)

    And then write back invalidate the cache at the address p_x

    And report what you see

    Ran

  • Hi Ran,

    Thank to your comment I just realized I was passing to the CACHE_... functions the value of x instead of its address! Now it works, what a stupid error!

    Thanks for your help.

    Sara