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pcie can't acquire DEVICE_ID after c6678 and K7 LINK UP

pcie can't acquire DEVICE_ID after c6678 and K7 LINK UP

my code is C:\ti\pdk_C6678_1_1_2_6\packages\ti\drv\pcie\example\sample demo

1. DSP(RC) ,FPGA(EP)

2.my location config

barCfg.location = pcie_LOCATION_LOCAL; //配置本地的配置寄存器
barCfg.mode = pcie_RC_MODE;
barCfg.base = 0x70000000;//PCIE_IB_LO_ADDR_M;
barCfg.prefetch = pcie_BAR_NON_PREF;
barCfg.type = pcie_BAR_TYPE32;
barCfg.memSpace = pcie_BAR_MEM_MEM;
barCfg.idx = PCIE_BAR_IDX_M; //region1

3.Inbound Translation

ibCfg.ibBar = PCIE_BAR_IDX_M; /* Match BAR that was configured above*/ //BAR1
ibCfg.ibStartAddrLo = PCIE_IB_LO_ADDR_M;//0x90000000
ibCfg.ibStartAddrHi = PCIE_IB_HI_ADDR_M;//0x00000000
ibCfg.ibOffsetAddr = (uint32_t)pcieConvert_CoreLocal2GlobalAddr ((uint32_t)dstBuf.buf);
ibCfg.region = PCIE_IB_REGION_M; //region 0 也可以选择 1、2、3

4.Outbound Translation

if ((retVal = pcieObTransCfg (handle, PCIE_OB_LO_ADDR_M(0x70000000), PCIE_OB_HI_ADDR_M(0x00000000), PCIE_OB_REGION_M)) != pcie_RET_OK)

/*PCIE_OB_REGION_M 0 */

5.LINK UP AFTER

System_printf ("Link is up.\n");

priority.mstPrivID = 11;
setRegs.priority = &priority;
Pcie_writeRegs (handle, pcie_LOCATION_REMOTE, &setRegs);

/* 写FPGA的PCIE BUS FUNCTION DEVICE号 */
remote_cfg_setup.type = 0;
remote_cfg_setup.bus = 0;
remote_cfg_setup.device = 0;
remote_cfg_setup.func = 0;

setRegs.cfgTrans = &remote_cfg_setup;
if ((retVal = Pcie_writeRegs (handle, pcie_LOCATION_REMOTE, &setRegs)) != pcie_RET_OK)
{
System_printf ("SET CMD STATUS register failed!\n");
}
if ((retVal = Pcie_getMemSpaceRange (handle, &pcieBase, NULL)) != pcie_RET_OK) {
System_printf ("getMemSpaceRange failed\n", (int)retVal);
exit(1);
}

/* 读取远程配置寄存器*/
volatile UInt32 *epCfg = (UInt32 *)0x21801000;
int n=0;
for(n = 0; n < 116; n+=4)
{
System_printf("offset: 0x%x : %08x %08x %08x %08x\n", n*4, epCfg[n+0], epCfg[n+1], epCfg[n+2], epCfg[n+3]);
System_flush();
}
/* 读取远程配置寄存器*/
volatile UInt32 *epCfg1 = (UInt32 *)0x21802000;
for(n = 0; n < 116; n+=4)
{
System_printf("offset: 0x%x : %08x %08x %08x %08x\n", n*4, epCfg1[n+0], epCfg1[n+1], epCfg1[n+2], epCfg1[n+3]);
System_flush();
}

6 printf

Successfully configured Inbound Translation!
Successfully configured Outbound Translation!
Starting link training...
Link is up.


offset: 0x0 : 8888104c 00100146 00000001 00010000
offset: 0x10 : 00000000 70000000 00000000 00000000
offset: 0x20 : 00000000 00000000 00000000 00000000
offset: 0x30 : 00000000 00000040 00000000 000001ff
offset: 0x40 : 00035001 00000000 00000000 00000000
offset: 0x50 : 00807005 00000000 00000000 00000000
offset: 0x60 : 00000000 00000000 00000000 00000000
offset: 0x70 : 00420010 00008001 0005281f 00135422
offset: 0x80 : 10110008 00000040 004003c0 00000000
offset: 0x90 : 00000000 0000001f 00000000 00000006
offset: 0xa0 : 00010002 00000000 00000000 00000000
offset: 0xb0 : 00000000 00000000 00000000 00000000
offset: 0xc0 : 00000000 00000000 00000000 00000000
offset: 0xd0 : 00000000 00000000 00000000 00000000
offset: 0xe0 : 00000000 00000000 00000000 00000000
offset: 0xf0 : 00000000 00000000 00000000 00000000
offset: 0x100 : 00010001 00002000 00000000 00062030
offset: 0x110 : 00000001 00002000 000001ed 00000000
offset: 0x120 : 00000000 00000000 00000000 00000000
offset: 0x130 : 00000057 00000000 00000000 00000000
offset: 0x140 : 00000000 00000000 00000000 00000000
offset: 0x150 : 00000000 00000000 00000000 00000000
offset: 0x160 : 00000000 00000000 00000000 00000000
offset: 0x170 : 00000000 00000000 00000000 00000000
offset: 0x180 : 00000000 00000000 00000000 00000000
offset: 0x190 : 00000000 00000000 00000000 00000000
offset: 0x1a0 : 00000000 00000000 00000000 00000000
offset: 0x1b0 : 00000000 00000000 00000000 00000000
offset: 0x1c0 : 00000000 00000000 00000000 00000000

offset: 0x0 : 00000000 00000000 21802000 00000070
offset: 0x10 : 00000000 00000000 21802000 00000000
offset: 0x20 : 00000000 00000000 21802000 00000004
offset: 0x30 : 00000000 00000000 21802000 00000008
offset: 0x40 : 00000000 00000000 21802000 0000000c
offset: 0x50 : 00000000 00000000 21802000 00000010
offset: 0x60 : 00000000 00000000 21802000 00000014
offset: 0x70 : 00000000 00000000 21802000 00000018
offset: 0x80 : 00000000 00000000 21802000 0000001c
offset: 0x90 : 00000000 00000000 21802000 00000020
offset: 0xa0 : 00000000 00000000 21802000 00000024
offset: 0xb0 : 00000000 00000000 21802000 00000028
offset: 0xc0 : 00000000 00000000 21802000 0000002c
offset: 0xd0 : 00000000 00000000 21802000 00000030
offset: 0xe0 : 00000000 00000000 21802000 00000034
offset: 0xf0 : 00000000 00000000 21802000 00000038
offset: 0x100 : 00000000 00000000 21802000 0000003c
offset: 0x110 : 00000000 00000000 21802000 00000040
offset: 0x120 : 00000000 00000000 21802000 00000044
offset: 0x130 : 00000000 00000000 21802000 00000048
offset: 0x140 : 00000000 00000000 21802000 0000004c
offset: 0x150 : 00000000 00000000 21802000 00000050
offset: 0x160 : 00000000 00000000 21802000 00000054
offset: 0x170 : 00000000 00000000 21802000 00000058
offset: 0x180 : 00000000 00000000 21802000 0000005c
offset: 0x190 : 00000000 00000000 21802000 00000060
offset: 0x1a0 : 00000000 00000000 21802000 00000064
offset: 0x1b0 : 00000000 00000000 21802000 00000068
offset: 0x1c0 : 00000000 00000000 21802000 0000006c

  • Welcome to the TI E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages (for processor issues). Be sure to search those for helpful information and to browse for the questions others may have asked on similar topics (e2e.ti.com). Please read all the links below my signature.

    We will get back to you on the above query shortly. Thank you for your patience.

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  • Please refer the "Readme.txt" for sample usage,

    PATH: ~ti\pdk_C6678_1_1_2_6\packages\ti\drv\pcie\example\sample

    Thank you.
  • I glad to receive your reply thinks
    I was careful readS TI's file what include PCIE guide 6678 datasheet and PCIE stander TI'S Forum answer but i don't finds out answer
    now i don't idea to slave my qustion hope you can help me give me a direction or a idea
  • NOW I add to cmdStatus.obXltEn = 1; that at link up after i can't  access remote configure region

    when I access 0x21802000 CCS debug is stop waring 

    C66xx_1: Failed to remove the debug state from the target before disconnecting.  There may still be breakpoint op-codes embedded in program memory.  It is recommended that you reset the emulator before you connect and reload your program before you continue debugging

  • Are you using C6678 EVM or C6678 custom board ?
    Can you please follow the suggestions mentioned in the below post ?
    e2e.ti.com/.../509371

    Please let us know the result.