I have now spent over TWO weeks just trying to get basic IPC working on the 66AKH12 chip for ARM->DSP and DSP->DSP. The basic shared memory DSP/DSP IPC library/configuration/examples were fine, but the more I dig into the ACTUAL implemented and tested support for ARM->DSP and virtio/messageQ it is becoming clear that the codebase is immature, incomplete and almost unusable. I have read through multiple threads, posted numerous questions that have gone unanswered (shocked, welcome to the new TI), and tried EVERY combination of IPC examples scattered through the various named and renamed "modulea" (BIOS/SDK/PDK) and have tried to configure every way I could find by guessing, reading scattered and incomplete documentation across Wikis, actual Doxygen, and here.
I think we are now at a point that the one of the basic strengths of TI chipset is almost completely gone. The mature/robust code base, clear example, and really good documentation that got us up and going are now gone. I have one engineer spending three months building and rebuilding kernels with patches that are not included, and currently we have discovered TI decided to disable DDRB for no real reason other than they wanted to, breaking a lot of things. mpmcl does not work and hangs on this kernel. You can not load DSP code from CCS to test ARM->DSP because of dependencies and decisions that are completely unclear looking at the actual hardware.
And asking for ONE clear example code for this chip has yielded nothing, because there isn't one. It is almost as if no one has actually used this chip for IPC at TI during development. Posts here indicate that it is near impossible to support to transports for communication at the same time.
I am on the verge of giving up and just rewriting my own IPC codebase using the hardware support that seems well in place for a simple clean implementation. So I'll ask ONE MORE TIME, can anyone point me to ONE existing ARM->DSP and DSP->DSP IPC example for THIS particular keystone processor at TI?