Other Parts Discussed in Thread: TMS320C6202
TMS320C6678
I have ordered Spectrum Digital XDS560V2 PRO TRACE emulators for our TMS320C6678 DSP design debugging/verification effort.
Our DSP design includes an external watchdog timer which drives a Power On Reset of the DSP when the watchdog timer is not reset before hitting its terminal count.
While I wait for our target HW and the emulator, I am writing test procedures, and I am trying to determine if we should plan on disabling the watchdog timer during debug sessions when 'poking' a value into C6678 CorePac data memory becomes necessary.
Two Questions:
(1) Can an XDS560V2 PRO TRACE emulator access (read or write) CorePac L2 cache memory space (being used as a CorePac Data Memory segment) without first halting the CorePac?
(2) If yes to (1), does a runtime XDS560V2 PRO TRACE emulator access to CorePac L2 cache memory space (being used as a CorePac Data Memory segment) temporarily suspend CorePac - C66x DSP execution while the access is taking place?
I remember when performing similar accesses 14 years ago with the PCI based XDS560 emulator to debug a TMS320C6202 DSP design that runtime emulator write accesses to data memory (by updating the contents of a memory window, for example) with the XDS560 emulator produced unpredictable results (sometimes the emulator would lock up) if we didn't first halt the C6202 DSP using the XDS560 emulator before using the emulator to overwrite a value in DSP internal memory, and then allow the C6202 DSP code execution to resume again. I want to determine whether or not the XDS560V2 behaves similarly.
Thank you,
Jim Sanchez
