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TCI6636K2H: CPRI loopback test fail in custom board

Part Number: TCI6636K2H
Other Parts Discussed in Thread: LMK04828, CDCM6208, CDCM7005

Dear Champs,

My customer failed to work internal loopback test in their custom board although there was no issue in EVM.

They faced lack of PKTDMA buffer when they test it using PKTDMA , and it seemed it can not receive any packets over 2ms. 

When they checked below resisters, it seemed this fail caused by UNSYNC frame. Could you please provide guide how they can debug this issue in their custom board?

They used aif2LteSingleToneK2HTestProject and aif2LteCheckRfK2HTestProject of pdk_keystone2_3_01_02_05.

gel file : C:\ti\ccsv6\ccs_base\emulation\boards\xtcievmk2x\gel\xtcievmk2x.gel

~~~~~~~~

Address: 0x1F50014 (RM_LK_STS0[0] Register)

EVM board (0x308)

FRAME_SYNC

custom board (0x1)

UNSYNC

 

Address: 0x1F50018 (RM_LK_STS1[0])

EVM board: (0x90000)

Number of Line Code Violations counted since last cleared and enabled: 0x9

Number of los_det, 8b10b code violation, occurrences in a master frame: 0x0

custom board: (0xFFFF000B)

Number of Line Code Violations counted since last cleared and enabled: 0xffff

Number of los_det, 8b10b code violation, occurrences in a master frame: 0xb

 

Address: 0x1F50020 (RM_LK_STS3[0])

EVM board  (0x1000000)

Receiver FSM is in the HFSYNC state ST3

Custom board (0x2000000)

Indicates Loss Of Frame when the receiver FSM is in state ST0 or ST1. 

Thanks and Best Regards,

SI.

  • Hi,

    I've notified the TCI66x team. Their feedback will be posted here.

    Best Regards,
    Yordan
  • Hi, it is somewhat difficult to diagnose issues on custom hardware, but I would say the place to start would be to examine/compare the external signals (at least to AIF2) and work inwards.  Looking at Figure 7-2 of the AIF2 user guide, this would be AIF_REFCLK, AIF_RP1CLK, CPU/3 (you may not require RP1), the SerDes configuration, etc.

      -dave

  • Hi,

    We checked every external clock except RP1, but couldn't find any problem.

    How can we check AIF_REFCLK and CPU/3?

    We are also wondering if C:\ti\ccsv6\ccs_base\emulation\boards\xtcievmk2x\gel\xtcievmk2x.gel is proper file for aif2LteSingleToneK2HTestProject.

    Below zip file contains AIF register values saved after AIF_initHw(&aifObj); in ltecheckrf.c.

    AIF_reg_evm.data is for TCI6638K2K-EVM board and AIF_reg_custom.data is for our custom board (TCI6636K2H). 

    Can you help us if any register configuration is incorrect in our board?

    Regards,

    Dong Kwan Lee

    AIF_register_dump.zip

  • Hi,

    We checked every external clock except RP1, but couldn't find any problem.

    How can we check AIF_REFCLK and CPU/3?

    We are also wondering if C:\ti\ccsv6\ccs_base\emulation\boards\xtcievmk2x\gel\xtcievmk2x.gel is proper file for aif2LteSingleToneK2HTestProject.

    Attached zip file contains AIF register values saved after AIF_initHw(&aifObj); in ltecheckrf.c.

    AIF_reg_evm.data is for TCI6638K2K-EVM and AIF_reg_custom.data is for our custom board (TCI6636K2H). 

    Can you help us to find if any register configuration is incorrect in our board?1104.AIF_register_dump.zip

  • Hi,

    Is there anyone to guide what we have to check? 

    If have, pls let us know. thanks in advance.

    Thanks.

    Shinha.

  • Dave and TI exports,

    We are using LMK04828 as SYSCLK.
    We had tested with other Clock source, such as CDCM7005, CDCM6208 and VCXO.
    With other clock source, We can resolve the AIF Unlock issue.

    So I have a question ;
    LMK04828 cannot be used as K2H SYSCLK ?
    It works well on ARM side, but not work properly on C66x DSP core.
    Could you let me know your opinion?

    Thanks.

  • it was LMK04828 HW design issue.
    Thanks for your support.

    Thanks and Best Regards,
    SI.