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66AK2G02: JTAG Questions

Brian Antheunisse
Expert 5195 points
Part Number: 66AK2G02

Hi Team,

I have a customer who is using the K2G02 in their system and they have some questions:

Refer to my "JTAG" drawing (only visible to TI employees here --> ), JTAG signals are buffered.

 

Q1: Do we need pullup resistor for EMU00, EMU01, TDO, TCK, TDI, TRSTn and TMS? If so, is it 4.7Kohm or 10Kohm?

 

Q2: Can we eliminate the 1-bit buffer, SN74AVC1T45DBVR, and move SOC_TDO to A5 of SN74AVC8T245RHL (currently, A5 is not used and grounded in my drawing) and MIPI_TDO to B5 of SN74AVC8T245RHL? Since TDO is the only output pins on K2G I am not sure to have separate 1-bit buffer design on EVMK2G is for trace path or other reasons.

 

Q3: The 22ohm series resistors for SOC_TCK and MIPI_RTCK are for unbuffered configuration in Table 17 of spru655i. Should I use the same 22ohm series resistors for SOC_TCK and MIPI_RTCK in my buffered-configuration design as in EVMK2G(also has buffered configuration)?

 

Q4: This custom board will serve the purposes for both R&D and end-product. For product, we won't populate MIPI 60 header, series resistors, pull-up/pull-down resistors and buffers. Does my design (check my drawings) take care of both R&D and product cases? Do I miss anything? 

 

Thanks,

Brian

  • 0
    TI__Guru**** 161600 points
    Hi Brian,

    For some reason I don't have access to the link you pointed. I am looping the HW team.

    In the mean time the JTAG design guidelines are summarized in the following wikis:
    processors.wiki.ti.com/.../Keystone_Multicore_Device_Family_Schematic_Checklist
    processors.wiki.ti.com/.../XDS_Target_Connection_Guide

    Best Regards,
    Yordan
  • 0
    TI__Mastermind 42545 points

    Hi Brian,

    Q1: Pullup resistors are required. Use 4.7Kohm for 3.3V IOs.

    Q2: Much of the buffering on the K2G EVM was present due to the different voltage domains. The XDS200 circuit was powered from the VBUS on the USB connector. This might be present when power was not applied to the EVM so buffering was necessary to transition from the VBUS powered domain to the board powered domain. 

    With that said, I always recommend buffering for JTAG signals on the board. It is often difficult to place the JTAG connector as close to the SoC as recommended. Noise on the JTAG lines will cause the emulator to reduce the clock frequency in an attempt to provide a solid JTAG connection which will hurt performance. Adding buffers usually solves this problem. Note that the customer has the MIPI connector powered by the VCC3V3_MIPI and the SoC by VCC3V3_DCIN. In the EVM schematics you will see that VCC3V3_MIPI is connected to the VCC3V3_DCIN through a ferrite bead. 

    Q3: Series resistors are not necessary if you are buffering the clock and the return clock. While series resistors can be used to effect any noise on the clock signals, that generally isn't an issue if a dedicated buffer is present.

    Q4: I would recommend installing the pullup and pulldown resistors on the JTAG signals. While the K2G includes internal pulls on these signals, it is recommended that external pulls are included if a trace is connected to the signal balls.  I also don't see your connection between VCC3V3_MIPI and VCC3V3_DCIN. 3.3V must be connected to pin 1 through a 100ohm resistor. spru655i also states that pin 15 should be connected to ground through a 0ohm resistor. 

    Regards,

    Bill

  • 0 in reply to Bill Taboada
    TI__Expert 5195 points

    For Q2, I want to re-phrase my question. On K2G EVM, there are two buffering chips for 7 JTAG signals. The 1-bit buffer, SN74AVC1T45DBVR, for TDO signal. The 8-bit buffer, SN74AVC8T245RHL, for other 6 signals. Since there are 2-bit available on the 8-bit buffer, SN74AVC8T245RHL, can we use this 8-bit buffer for TDO signal as well?

    Also, what is the point of the zero ohm resistor on pin 15?

    Thanks,
    Brian

  • 0 in reply to Brian Antheunisse
    TI__Mastermind 42545 points
    Hi Brian,
    You can't use one of the available bits the way that the circuit is currently drawn. The SN74AVC8T245RHL drive signals from the VCC3V3_MIPI voltage domain to the VCC3V3_DCIN voltage domain. If you connected the TDO bit to input side of the SN74AVC8T245RHL, it would be connected to the wrong voltage domain. If you choose to use a single voltage version of the 245 buffer then you could connect TDO to one of the spare bits.
    I'm not sure of the purpose of the zero ohm resistor. I'll see if I can get that information from the emulation team but it is shown as a requirement in the document you sited.
    Regards,
    Bill