Tool/software: Code Composer Studio
Experts,
I am trying to use the HyperLink example: pdk_C6670_1_1_2_6\packages\ti\drv\hyplnk. I have 2 C6670s hooked up with a hyperlink cable. I have loaded the example up on both DSPs, using the same .out file on both.
I've got an instance of code composer open for each and a different workspace for each. The configuration options are the same on both.
When i begin debugging the two, the console output is as follows. An interesting point is that they are alternating numbers between the two instances of CCS.
Thanks in advance.
From one DSP:
[C66xx_0] SERDES_STS (32 bits) contents: 0x03460c1b; lock = 1
Waiting for other side to come up ( 2)
Waiting for other side to come up ( 3)
Waiting for other side to come up ( 5)
Waiting for other side to come up ( 8)
Waiting for other side to come up ( 11)
Waiting for other side to come up ( 166)
Waiting for other side to come up ( 167)
Waiting for other side to come up ( 168)
Waiting for other side to come up ( 169)
Waiting for other side to come up ( 172)
Waiting for other side to come up ( 173)
Waiting for other side to come up ( 175)
Waiting for other side to come up ( 176)
Waiting for other side to come up ( 178)
Waiting for other side to come up ( 182)
Waiting for other side to come up ( 183)
Waiting for other side to come up ( 185)
Waiting for other side to come up ( 189)
From the other:
[C66xx_0] Version #: 0x01000105; string HYPLNK LLD Revision: 01.00.01.05:Nov 16 2012:18:29:50
About to do system setup (PLL, PSC, and DDR)
Power domain is already enabled. You probably re-ran without device reset (which is OK)
Constructed SERDES configs: PLL=0x00000064; RX=0x0046c495; TX=0x000cc315
system setup worked
About to set up HyperLink Peripheral
============== begin registers before initialization ===========
Revision register contents:
Raw = 0x4e901900
Status register contents:
Raw = 0x00002004
Link status register contents:
Raw = 0x00000000
Control register contents:
Raw = 0x00000001
Control register contents:
Raw = 0x00000000
============== end registers before initialization ===========
Waiting for other side to come up ( 0)
Waiting for other side to come up ( 1)
Waiting for other side to come up ( 4)
Waiting for other side to come up ( 6)
Waiting for other side to come up ( 7)
Waiting for other side to come up ( 9)
Waiting for other side to come up ( 10)
Waiting for other side to come up ( 12)
Waiting for other side to come up ( 13)
Waiting for other side to come up ( 14)
Waiting for other side to come up ( 15)
...
Waiting for other side to come up ( 164)
Waiting for other side to come up ( 165)
Waiting for other side to come up ( 170)
Waiting for other side to come up ( 171)
Waiting for other side to come up ( 174)
Waiting for other side to come up ( 177)
Waiting for other side to come up ( 179)
Waiting for other side to come up ( 180)
Waiting for other side to come up ( 181)
Waiting for other side to come up ( 184)
Waiting for other side to come up ( 186)
Waiting for other side to come up ( 187)
Waiting for other side to come up ( 188)
Waiting for other side to come up ( 190)
Waiting for other side to come up ( 191)
