66AK2H14: Difference between two DDR3 controllers

Madhu Sharma

Part Number: 66AK2H14

Hi,

In the functional block diagram of 66AK2H14 ( page 4 of SPRS866E), there is a connection difference in two DDR3 controllers. One is directly connected to MSMC and the other is connected to TeraNet and then to MSMC.

So Is there any performance difference between these two DDR3 controllers?

Regards,

Madhu.

over 6 years ago

0 Cvetolin Shulev-XID over 6 years ago

TI__Guru 65405 points

Hi Madhu,

I've forwarded this to the hardware experts. Their feedback should be posted here.

BR
Tsvetolin Shulev

0 Tom Johnson 16214 over 6 years ago in reply to Cvetolin Shulev-XID

TI__Mastermind 46460 points

Madhu,

There is a significant difference based upon this topology. DDR3A is attached to MSMC and thus it has best performance from the ARM cores. DDR3B is attached directly to the Teranet so that it has best performance from other masters on the Teranet. Not only are there topology differences but there are bus width differences too that impact throughput. A detailed analysis of the latency and throughput of all of these connections is addressed in the Throughput Performance Guide for KeyStone II Devices Application Report (SPRABK5B) available at http://www.ti.com/lit/pdf/sprabk5

Tom

0 Tom Johnson 16214 over 6 years ago in reply to Tom Johnson 16214

TI__Mastermind 46460 points

Post edited to fix link

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66AK2H14: Difference between two DDR3 controllers