TMS320C6657: The capacitors for VREFSSTL w/o DDR3 memory

Kzk

Genius 5785 points

Part Number: TMS320C6657

Hello,

Is it necessary to mount two 0.1 μF capacitors for VREFSSTL when C6657 does not have DDR3 memory?

Hardware Design Guide for KeyStone I Devices (SPRABI2C)
Figure 4 DDR3 VREFSSTL Voltage Divider

Regards,
Kazu

over 6 years ago

0 Cvetolin Shulev-XID over 6 years ago

TI__Guru 65405 points

Hi Kazu,

I've forwarded this to the design experts. Their feedback should be posted here.

BR
Tsvetolin Shulev

0 Yordan Kovachev over 6 years ago

TI__Guru**** 161600 points

Hi Kazu,

This is clearly stated in Section 6.8.3 Unused DDR3 Pin Requirement of the Hardware Design Guide for keystone II devices ():

Best Regards,
Yordan

0 Kzk over 6 years ago in reply to Yordan Kovachev

Genius 5785 points

Hello Yordan,

Thank you for your quick reply. Yes, I'll mount two 1 kΩ registers to divide DVDD15 and generate VREF (0.75 V) supply. Then I'll connect the VREF supply to the VREFSSTL pin. My question is whether I should mount two capacitors as below. I'm sorry for asking at minor things.

Regards,
Kazu

0 Tom Johnson 16214 over 6 years ago in reply to Kzk

TI__Mastermind 46460 points

Kazu,

The detailed requirements for meeting the JEDEC requirements of the VREFSSTL do not need to be met when not using DDR. However, the absolute limits listed in the Data Manual must be met. Therefore, the voltage divider and the some filtering may be needed.

Tom

0 Amir Natan over 6 years ago in reply to Tom Johnson 16214

Intellectual 310 points

Hello Tom,

Can you advise current consumption of the VREFSSTL pin on the 6678?

Regards,
Amir

0 Tom Johnson 16214 over 6 years ago in reply to Amir Natan

TI__Mastermind 46460 points

Amir,

This is not characterized but it is known to be a very low input current since the bias is created using two 10K ohm resistors in series and the end result is a voltage that is required to be within 1% of the midpoint voltage.

Tom

0 Amir Natan over 6 years ago in reply to Tom Johnson 16214

Intellectual 310 points

Hi Tom,

Thanks for your prompt response.

Do you know if there is a complete summary regarding Max currents per voltage-rails for the C6678?

(there is a summary table for the 6657 - https://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/204277/724947#724947)

Regards,

Amir

0 Tom Johnson 16214 over 6 years ago in reply to Amir Natan

TI__Mastermind 46460 points

Amir,

That table shows pre-silicon estimates that are worst-case to support the EVM development for the C6657 EVM. This is stated in the post. Similarly, if you refer to the documentation for the C6678 EVM, you will see similar pre-silicon estimates that are worst-case to support the EVM development. However, these numbers are conservative estimates of current consumption published prior to power consumption characterization. Please refer to the C6678 Power Consumption Model (Rev. D) at: http://www.ti.com/lit/zip/sprm545 The general link for this is on the C6678 web page on TI.COM. This tool then provides a link to the Power Consumption Summary for KeyStone C66x Devices Application Report (SPRABI5B) at: http://www.ti.com/lit/an/sprabi5b/sprabi5b.pdf Proper use of this tool will provide maximum load current estimates based on your application requirements.

Tom

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TMS320C6657: The capacitors for VREFSSTL w/o DDR3 memory