Other Parts Discussed in Thread: SYSBIOS
Tool/software: TI-RTOS
Hello ti,
We are working on a project where we want to transfer interrupt comming from GPIO to one core in stead of serveral cores.
We use as stated the c6000 family but only 2 processors finaly we will go to the 6672. We now find an intresting example on this fora: http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/171824
from which we discover how to set in interrupt by using csl.
Now we are wondering how to split up this code when to excute them because we have a call 2 sysbios somewhere during start up on each core (only 2). Do we beed to insert this code before or after a call to sysbios?
BR.