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TMS320TCI6614: Enabling DDR3 ECC on Keystone

Part Number: TMS320TCI6614

Hi,

I am trying to enable DDR ECC on our Keystone I product.

Say, I want to ECC-protect the lowest smallest region of RAM (region 0x80000000 - 0x80010000). I would write 0x00010000 to the ECCADDR1 (0x21000114) register. The ECCCTL (0x21000110) would get 0xc0000001 (enable ECC, enable regions, enable region 1). This is done in U-Boot before DDR3 leveling procedure (to ensure the ECC lanes get leveled properly).

Then I would read an unprotected address, for example, 0x88000000. This always works.

Then I would read a protected address, 0x80000000. This sometimes works, sometimes crashes U-boot. I could not find any consistency in this behaviour. I am reading 2 32-bit words at a time (md.l 88000000 2). I tried writing the protected region with known values first to initialize the ECC. Writing also sometimes works and sometimes crashes U-boot.

I would like to get any information on what I may be doing wrong. Or if there is a step-by-step procedure how to enable DDR ECC, that would be helpful as well.