Team,
My customer has the following question:
Unused HyperLink reference clock (specifically, HyperLink 1). There are conflicting guidance in the Hardware Design Guid for Keystone II Devices Application Report document, SPRABV0, March 2014. Please provide clarification.
Relevant sections:
Section 6.2.5, Unused HyperLink Pin Requirement, makes reference to Figure 15 in Section 3.3, and a pull-up to CVDD core supply.
The last sentence is key: “If unused, the primary HyperLink clock input must be configured as indicated in Section 3.3, Figure 15. Pull-up must be to the CVDD core supply.”
Going to Section 3.3 we find two things.
Figure 15 shows a direct connection to CVDD and a pull-down to VSS:
Following Figure 15 in the same section, we are presented with Table 8. Table 8 provides a detailed list of all clocks and the “Connection for Unused.” HyperLink 1 reference clock inputs (HYP1CLKP and HYP1CLKN) are listed with “Leave unconnected” as the connection. This is in direct conflict with Figure 15.
Any help is appreciated:
Regards,
Aaron