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RTOS/TMS320C6678: C6678 based platform fails to boot with complex .out(big .out file) file

Other Parts Discussed in Thread: SYSBIOS

Hello,

I've followed to http://processors.wiki.ti.com/index.php/File:C6678_directROM_boot_examples.zip to make a bootable image/program it on the SPI flash memory and succeeded to see "Hello World" output on UART.

However it fails to boot when I use complex .out(big .out file) files as source image.

I found http://processors.wiki.ti.com/index.php/KeystoneI_Bootloader_Resources_and_FAQ#SPI_boot workaround regarding this issue but  it didn't help.

Could you please advice - is there anything else to do / modify source for this?

Regards

Andranik

  • I've forwarded your query to the software experts. Their feedback should be posted here.

    BR
    Tsvetolin Shulev
  • Can you please post your binary here and also provide the steps to reproduce this issue. How big is the file complex .out . Are getting any errors while building the binary ?

    Regards,
    Rahul
  • Please find attached the binary file which I try to make bootable with next sequence:

    • compiled the C:\ti\pdk_C6678_1_1_2_6\packages\ti\platform\evmc6678l\platform_test example source
    • downloaded SPI Direct Boot Example (without IBL) from http://processors.wiki.ti.com/index.php/File:C6678_directROM_boot_examples.zip
    • renamed the attached binary to led_play.out and paste to the build folder instead of default one
    • followed to documentation in the archive to make the SPI bootable file (previously I made / tested bootable file based on original led_play project and it booted successfully)
    • programmed the image to SPI flash 
    • power cycled the board
    • after powering up the board the image successfully fetches from SPI flash -  we've connected the the logic analyzer to DSP-Flash SPI channels and the fetched information from flash is identical to one we wrote to it
    • DSP doesn't output anything on UART channel or outputs some strange characters sequence

    I don't see any error while building the binary / creating bootable image.

    FYI: The attached binary is compiled from C:\ti\pdk_C6678_1_1_2_6\packages\ti\platform\evmc6678l\platform_test example source and it shows UART output pretty well when I load / execute it by using JTAG chain instead of making the binary executable / program to the SPI flash / boot from it.

    Regards

    Andranik

    1830.platform_test_evmc6678l.zip

  • Guys, any update on this?

    Andranik
  • Andranik,

    We were pinged by Philip on this issue and we are picking this issue up from where we left off. I apologize for the delay as I was out of in the month of December.  you mentioned the image is loaded into the device from SPI flash, correct?  Have you connected to core0 and looked at where the program counter is ?  This is will help determine if the DSP Boot ROM exited and there is some issue with transfering control to the application binary.

    The other issue that I noticed was that in the platform_test MSMC section is defined to start at oxc000000 and length of 0x200000 but the led_blink.rmd file used for the led_blink example, creates binary starting from 0xc000000 maximum upto length 0x100000. Can you please change that in the .cmd file and let us know if this changes the behavior.

    Regards,

    Rahul

  • Rahul,

    I see from logic analyzer signals that the DSP Boot ROM fetches the image from the SPI flash but doesn't transfer control to the booted application properly.

    On the other side, I've modified the appropriate ROM1 length in .rmd and MSMCSRAM length in .cmd configuration files according your suggestion but it didn't help as well.

    Regards
    Andranik
  • Rahul,

    Currently I built an application which returns UART output on our C6678-based board - you can find the file attached to this message.

    UART_BasicExample_C6678_c66xExampleProject.out.zip

    In the other hand I have downloaded the C6678 SPI direct ROM boot example from there. I am able to see the the UART output after compiling the led_play application, making it bootable with the tools/methods provided in this example, re-configuring/re-building the nor writer tool (since our SPI NOR flash differs from the one C6678 evaluation module) and programming to the SPI NOR flash.

    Next step I do just replacing the led_play.out file with the attached file which execution gave me a proper UART output.

    After re-building the bootable image and programming the SPI NOR flash (the newer image is bigger than default one) I don't see any UART output.

    Could you please also mention the possible root causes for such kind of issue?

    Regards

    Andranik

  • Andrainik,

    The led blink example is running from device memory only. while the UART Example is using DDR (external memory) . In order to boot a image to DDR memory, you need to append a DDR configuration table to the binary or use a secondary bootloader like the IBL before loading the application to DDR. In case of your platform_test, the example you were running before all the code is placed in MSMC memory so we should be able to boot that binary directly from ROM without needing a secondary bootloader or DDR initialization.

    Regards,
    Rahul
  • Rahul,

    Thank you for quick answer.

    So my first goal should be making a bootable flash with the platform_test example which doesn't need an extra DDR configuration.

    But the thing is I can't see the UART output event when I try to make the platform_test example bootable and write it to SPI NOR flash despite the facts that:

    - I've succeeded to see the output when I load the platform_test example via JTAG

    - I've succeeded to see the UART output with the same bootable image making + SPI NOR flash writing procedures for the led_play example

    - I've verified the bootable image write / boot image fetch procedures with the logic analizer

    By the way:

    We develop our Board Support Package based on Processor SDK RTOS for C667x DSPs and the platform_test example is from the MCSDK.

    Could you please mention the examples from the Processor SDK which don't need the DDR configuration / addition?

    Regards

    Andranik

  • Andranik,

    I was able to take the platform_test.out file was able to boot it on my EVM but the application doesn`t run any tests because there is a file IO operation at the start of the platform_test.out which will hang when there is no emulator connected to the platform.

    I have attached the pre-built binary for you to try. After the booting, the boot image, if you connect to the DSP Core0 without a GEL file, you will notice that the code is at address 0x0c04c1a0 where the symbol _dofgets RTS function is defined.

    Platform_test.zip

    Here are screenshot for you to reproduce the result. After you flashed the app.dat, Change the boot switches, and then power on the DSP. Connect an emulator to the EVM and launch debug view. Remove the GEL file as this will change device state.  Now connect to the DSP and you will see the program counter is at 0x0c04c1a0. Now you can got to Run-> load symbols and browse to platform_test.out that you provided and see the location where the DSP is hung.

    This proves to me that the boot is working, it is an issue of running the application without JTAG that causes it to fail.

    Let me know if you disagree.

    Regards,

    Rahul

  • Rahul,

    I see the same behavior with the application sent by you - the debugger points to 0x0c04c1a0 address.
    As far as you describe - it means the SPI boot procedure is correct.

    So could you please mention the possible differences between loading the application via the JTAG chain and programming to/ booting from the SPI flash and workarounds for those differences?
    It will let us combine all those workarounds into the universal script for making bootable images.

    Regards

    Andranik

  • Andrainik,

    glad to know you were able to reproduce the results. When loading an application over JTAG, the GEL file runs as a helper script to initialize the device clocks, power domains and DDR memory interface with EMIF. When booting, the ROM bootloader when booting from SPI operates with PLL in bypass so you need to use a boot parameter table (nysh.map) to the boot image so setup the PLL and SPI speed and copies over the application to device onchip memory. To run application from DDR, you will need to either create a secondary/intermediate bootloader(IBL) as we provide in the Processor SDK RTOS to initialize DDR and then copy the application or append a DDR configuration table to the boot image to allow the ROM to setup the DDR.

    Traditionally, we have seen that DDR initialization using configuration table is harder to debug as the initialization code in the ROM code on this device. We have also seen that this can be less reliable as the DDR initialization sequence was updated in the spec after the ROM bootloader code was finalized and the configuration does allow for HW leveling. We recommend that you create a secondary bootloader that will load the full application.

    Regards,
    Rahul
  • Thank you, Rahul.

    Currently we don't have I2C EEPROM attached to C6678 DSP to program the IBL on it.
    Is it possible to use SPI flash attached to DSP as a container for secondary bootloader and force the ROM code to use it instead of I2C EEPROM?

    Regards
    Andranik
  • Rahul,

    I've finally succeeded to compile / program the IBL image to the SPI NOR flash but it doesn't output anything.
    I saw in the ~/ti/pdk_c667x_2_0_7/packages/ti/boot/ibl/src/main/iblmain.c file the IBL image should output a UART message at the start of application run.
    I can't see any output even when I run the ~/ti/pdk_c667x_2_0_7/packages/ti/boot/ibl/src/make/ibl_c66x/ibl_c66x.out as a usual application.
    I expect to see an output already, am I wrong?

    P.S.
    I can see a proper UART output when I run other / example / test UART applications.

    Regards
    Andranik
  • Andranik,

    The IBL loads itself in a two stage process. The ROM boot loader loads this first stage IBL first. This entire program must be endian independent in execution. This first loader reads the IBL parameters, and will endian switch them if required. The PLL is configured if indicated by the parameters.

    ibl_c66x_init.le.out is the first stage and ibl_c66x.out is the second stage. If you look at the makestg2 file in the ibl/src/make folder, you will see how the two binaries are created. You will not see any output from IBLMain unless IBLInit has been run.

    Regards,
    Rahul
  • Thank you Rahul
    I was able to see the UART output after loading/executing those two stages of bootloader sequentialy from the CCS side.
    However, neither the spiRom.dat nor the i2cRom.dat which are the combined versions of those two binaries and converted to CCS format as far as I understood, are not priNt output un UART after programming the file into the SPI flash and changing to SPI boot mode.

    Is there any step I've missed to do for expecting the output on UART?

    Kind regards
    Andranik
  • Hi,

    I am Rahul's colleague. Is that correct "main goal is to add a UART output on top of the PCIE_evmc6678_wSoCFile_C66BiosExampleProject example functionality included into the TI Processor SDK RTOS C667x."?

    Regards, Eric

  • Exactly, Eric.

    Thanks

    Andranik

  • Hi,

    There are standalone PCIE example and UART example CCS projects in SYSBIOS. Please run them seperately to make sure they worked. Then you need to merge them together.  Attached is an example how we merge several SYSBIOS examples together on another processor, the same applies to your case.

    -Merge SYSBIOS Configuration File

    -Merge Compiler and Linker Options and Linked Libraries

    Then replace PCIE_logPrintf with UART_printf.

    Regards, Eric

    Integrating_RTOS_examples.pdf