What is the meaning of the budget regulations in the Keystone 2 SerDes User's Guide?

Hidekazu

Hi,Everyone

Although the provision of budget is posted in the following user's guide,
I can not understand the part of (The full link budget is 3UI so lane to
lane skew can be larger if additional link analysis is completed.)

Can you explain as you can understand?

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KeyStone II Architecture (SerDes) User's Guide

www.ti.com/.../spruho3a.pdf (Page 33)

7.2 Recommended SerDes PCB Layout Constraints

• All four complementary transmit pairs RIOTXN/P3:0 shall be assigned
and routed as an individual net class, routing skew shall not be greater
than 100 ps between all transmit pairs. (The full link budget is
3UI so lane to lane skew can be larger if additional link analysis is completed.)
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Best Regards,
Honma

over 6 years ago

0 Cvetolin Shulev-XID over 6 years ago

TI__Guru 65405 points

I've forwarded your query to the hardware design experts. Their feedback should be posted here.

BR
Tsvetolin Shulev

0 Tom Johnson 16214 over 6 years ago in reply to Cvetolin Shulev-XID

TI__Mastermind 46460 points

Honma,

This is referring to the total allowable lane-to-lane skew for the complete end-to-end link which is defined in the industry standard document. I see here that you are referring to the length matching guidelines for SRIO. SRIO can be routed over a backplane. Therefore, the SERDES routing on the card containing the KeyStone-II device is only part of the complete end-to-end link. If you control all boards that comprise the end-to-end link, then you can manage the total skew for the link. Otherwise, we recommend that you follow the conservative guidance provided in the SERDES UG and limit the lane-to-lane skew to 100ps.

Tom

0 Hidekazu over 6 years ago in reply to Tom Johnson 16214

Intellectual 770 points

Tom
Thank you for your response.

I understood that the total allowable skew tolerance between lanes of a complete end - to - end link = 3 UI.

Best Regards,
Honma

0 Hidekazu over 6 years ago in reply to Hidekazu

Intellectual 770 points

Tom

By the way, although it is described as 15 pS in Hardware Design Guide for KeyStone I Devices, is this value meeting 3UI?
There is no description of 3 UI in the document of KeyStone.

www.integretek.com/.../HW-Design-Guide-For-Keystone-Devices-sprabi2b.pdf (Page 36)

Best Regards,
Honma

0 Tom Johnson 16214 over 6 years ago in reply to Hidekazu

TI__Mastermind 46460 points

Honma,

UI is a common term used with data communication links. It is the Unit Interval of a single bit period. For SRIO operation at 5GBaud, the UI is 200ps.

Tom

0 Hidekazu over 6 years ago in reply to Tom Johnson 16214

Intellectual 770 points

Hi Tom-san

I would like to know is not the value commonly used by SRIO (200 ps / 5 Gbaud),
15ps described in SERDES UG of keystone 1 satisfies the condition of 3UI
like keystone 2 It is whether or not.

-------------------------------------------------------
Keystone 1 15 ps / ?
SERDES UG and limit the lane-to-lane skew to 15ps.

Keystone 2 100ps / 3UI
SERDES UG and limit the lane-to-lane skew to 100ps.
--------------------------------------------------------

Best Regards,
Honma

0 Tom Johnson 16214 over 6 years ago in reply to Hidekazu

TI__Mastermind 46460 points

Honma,

You are correct that the KeyStone-I document is unnecessarily restrictive. I have already explained the intent of the 3UI link limit from the SRIO standard and the purpose of our recommended 100ps limit for individual cards in the KeyStone-II guidance.

Tom

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What is the meaning of the budget regulations in the Keystone 2 SerDes User's Guide?