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RTOS/TMS320C6670: Setting interrupts through cfg

Part Number: TMS320C6670
Other Parts Discussed in Thread: SYSBIOS

Tool/software: TI-RTOS

Hello!

Most of questions about interrupts settings are routed to wiki page, but I could not solve my difficulty with its only help, thus asking for community advice.

I have C6670. I want receive secondary interrupts through event combiner. Two particular events of interest are EDMA3CC0 EDMACC_GINT and PCIEXpress_ERR_INT. In Table 7-39 CIC0 Event Inputs — C66x CorePac Secondary Interrupts of device data manual events are listed as

Input Event# on CIC     System Interrupt        Description
36                      EDMA3CC0 EDMACC_GINT    EDMA3CC0 GINT
48                      PCIEXpress_ERR_INT      Protocol error interrupt

Both events belongs to CIC0 events. As I understand, CIC function is to map system event to channels, which known as host interrupts as well. It seems, that SYSBIOS module responsible for this is ti.sysbios.family.c66.tci66xx.CpIntc. As I understand, there is CpIntc.sysInts array with number of elements matching system events number. Each element of that array configures particular input of CIC, thus I have to tweak CpIntc.sysInts[36] and CpIntc.sysInts[48]. Is that right?

Suppose that is correct and proceed to event combiner. In the data manual in the Table 7-38 System Event Mapping — C66x CorePac Primary Interrupts we see:

Event Number    Interrupt Event     Description
56              CIC0_OUT0           Interrupt Controller output
57              CIC0_OUT1           Interrupt Controller output

CIC0 has about 80 outputs, but only 18 of them get routed to Core0. I wish to use 2 of them. As I understand, CIC outputs are nicknames for host interrupts. Then CIC0_OUT0 - is that host interrupt 0, CIC0_OUT1 - host interrupt 1? Is that right?

Suppose yes, then I have to route these two events to event combiner, and their numbers there should be 56, 57. Thus I code like this:

/* System event 36 EDMACC0 */
CpIntc.sysInts[36].fxn      = '&edma_isr';  /* My ISR                                                       */
CpIntc.sysInts[36].arg      = 36;           /* Is this correct?                                             */
CpIntc.sysInts[36].hostInt  = 0;            /* Channel/host interrupt 0, matching CIC0_OUT0 - is this right?*/
CpIntc.sysInts[36].enable   = true;
/* Map host interrupt to event combiner */
CpIntc.mapHostIntToEventCombinerMeta( CpIntc.sysInts[36].hostInt );

/* System event 48 PCIe Error */
CpIntc.sysInts[48].fxn      = '&pcie_err_isr';  /* My ISR                                                       */
CpIntc.sysInts[48].arg      = 48;               /* Is this correct?                                             */
CpIntc.sysInts[48].hostInt  = 1;                /* Channel/host interrupt 1, matching CIC0_OUT1 - is this right?*/
CpIntc.sysInts[48].enable   = true;
/* Map host interrupt to event combiner */
CpIntc.mapHostIntToEventCombinerMeta( CpIntc.sysInts[48].hostInt );

/* ISR for CIC0_OUT0 event 56 */
EventCombiner.events[56].fxn    = CpIntc.dispatch;
EventCombiner.events[56].arg    = 56;
EventCombiner.events[56].unmask = true;

/* ISR for CIC0_OUT1 event 57 */
EventCombiner.events[57].fxn    = CpIntc.dispatch;
EventCombiner.events[57].arg    = 57;
EventCombiner.events[57].unmask = true;

/**/
EventCombiner.eventGroupHwiNum[0] = 7;
EventCombiner.eventGroupHwiNum[1] = 8;
EventCombiner.eventGroupHwiNum[2] = 9;
EventCombiner.eventGroupHwiNum[3] = 10;

Please comment, whether my understanding is correct.

Thanks in advance.

  • Hi,

    We're looking into this.

    Best REgards,
    Yordan
  • Please talk to me, still I want to map system secondary event trough CIC to Event Combiner. Thanks.
  • Thank you very much for valuable help.

    It looks that working combination could be as:

    EventCombiner.eventGroupHwiNum[0] = 7;
    EventCombiner.eventGroupHwiNum[1] = 8;
    EventCombiner.eventGroupHwiNum[2] = 9;
    EventCombiner.eventGroupHwiNum[3] = 10;
     
    
    CpIntc.sysInts[36].fxn          = '&edma_isr';
    CpIntc.sysInts[36].arg          = 36;
    CpIntc.sysInts[36].hostInt      = 0;  // <-- here is a key
    CpIntc.sysInts[36].enable       = true;
    CpIntc.mapHostIntToEventCombinerMeta( CpIntc.sysInts[36].hostInt ); // <-- match here
    
    /* ISR for CIC0_OUT0 event 56 */
    EventCombiner.events[56].fxn    = CpIntc.dispatch;
    EventCombiner.events[56].arg    = CpIntc.sysInts[36].hostInt; // <-- and here
    EventCombiner.events[56].unmask = true;

    I looks like argument of ISR function in Event Combiner, which is CpIntc.dispatch, should be host interrupt number.

    There is something about multiple system interrupts mapping to one host interrupt, but I did not dig that deep yet.

    To discover this I had to perform whole process with C code, step inside all that XDC stuff and monitor parameters set in ROV.