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RTOS/66AK2H14: Invalid magic number in Single image header

Part Number: 66AK2H14

Tool/software: TI-RTOS

Hi,

We have designed  customized  board  using 66AK2H14. We are using CCSV7 and TI XDS 110 debug probe to connect board to CCS.

We are able to Flash MLO and gpio_led application using spi_flashwriter.

But when boot mode is changed to SPI,  facing below issue:

 
     **** PDK SBL ******
   SBL Revision: 01.00.07.00 (May 18 2018 - 13:05:07)
   Begin parsing user application
   MAGIC NUM: 202084688
   Invalid magic number in Single image header
   Jumping to user application...
 
Flashed same app to EVM , It was running successfully when boot mode is changed to SPI.
Only difference between EVM and custom board binary is MLO. For EVM we used sdk’s prebuilt MLO.
Q1. We just changed DDR3 configuration and Rebuilt MLO through makefile.Is there any other thing we are missing?
Regards,
Mahima Shanbag.

  • The team is notified. They will post their feedback directly here.

    BR
    Tsvetolin Shulev
  • In reply to Cvetolin Shulev-XID:

    Hi Tsvetolin Shulev,

    I thought issue may be with app header so I checked the app header using hexdump which looks similar to that of pre built post app in C:\ti_new\processor_sdk_rtos_k2hk_4_03_00_05\prebuilt-images.

    I have attached application's header here.headerdump3.txt

    I debugged step by step and found that

    fp_readData(&mHdrStr, srcAddr, sizeof (meta_header_start_t)); in sbl_rprc.c was not updating mHdrStr structure.
    Here is the screenshot of mHdrStr structure.

    And even the srcAddr of fp_readData() is different compared to EVM.


    we have only one DDR3 of 64 bit in our design. We just commented DDR3_1 in EVM_DDR.c File This is the only change we have done.

    Regards,

    Mahima Shanbag

     

  • In reply to mahima shanbag:

    Mahima,

    The full description of the multicore boot image is provided in the software developer guide here:
    processors.wiki.ti.com/.../Processor_SDK_RTOS_BOOT_AM57x

    As you can see, when the SBL parses the multi-core boot image, it expects to find the Magic string (0x5254534D) while in your boot image the magic word is read as 0xC0B9150 (202084688). Can you open your app image in a HEX Editor (eg. HxD) and look at the value in the magic string field to confirm that it is 0x5254534D. If the magic string in the app is correct then there is either an issue with the flash programming or in the SPI read code that is causing the SBL to read the incorrect string.

    Other than DDR are there any clocking changes on your custom board. Have you erases and perform read/write diagnostic test on your board to confirm SPI flash interface has no hardware or clocking issues. You can also hook up a scope and look at the first 20 bytes to look at the data received by the SOC. If there are clocking changes then you need to update the PLL setup in the board library and provide the correct SPI module clock in the SPI_soc.c file.

    Regards,
    Rahul

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  • In reply to Rahul Prabhu:

    Hi Rahul,
    Thank you for your suggestion.
    I checked in the app header , Magic string is 0x5254534D. I attached the app file in my previous reply[headerdump3.txt] .

    I found another issue:

    When I run the code I am getting below log.

    **** PDK SBL ******

    SBL Revision: 01.00.07.00 (May 18 2018 - 13:05:07)

    Begin parsing user application

    MAGIC NUM: 202084688

    Invalid magic number in Single image header

    Jumping to user application



    If I debug the code step by step I am getting correct magic number in the app header.



    **** PDK SBL ****
    SBL Revision: 01.00.07.00 (May 18 2018 - 16:36:10)
    Begin parsing user application
    MAGIC NUM: 5254534d
    Invalid magic number in boot image. Expected: 43525052, received: 84612043
    RPRC parse error
    Jumping to user application...

    When I debug step by step fp_readData() function is reading correct value. If I run the code, fp_readData() gives some other value.

    I thought issue may be with our board SPI clock so I tried running it on EVM , but got the same result as above.

     with our MLO , in EVM also I am facing same issue.

    I attached the MLO and sbl.out here.img.zip

    Please help me to solve this.

    Regards,
    Mahima Shanbag

  • In reply to mahima shanbag:

    Mahima,

    I am able to reproduce the issue on the EVM using your binary files and also able to confirm that the prebuilt MLO and the sbl.out in the SDK don`t have this issue. In order to effectively debug this issue, I now need to understand the full list of changes that you have made to the SBL source and have the ability to build this into my SBL build setup so I can step through your code.

    While I do that, I have a couple of experiments for you to try, by default the SPI configuration in the SBL sets up the SPI clock to 1Mhz and disables the interrupts when reading the image from the flash and sets the SPI phase and polarity to SPI_POL0_PHA1 as you can see from the SBL function SBL_spiInit in sbl_soc.c file. A good test would be to confirm that the issue is also seen when SPI clock is slower. Can you set the SPI clock to 200 Khz by adding the following line on line 90:

    spiParams.bitRate = 200000; // default set to 1000000 in SPI_drv.c file in SPI LLD

    Rebuild and try to see if it still reads incorrect values. I suspect Phase polarity shouldn`t change given the default setting is working.

    I would appreciate, if you can also provide the DDR changes that you made and any PLL clocking related changes that you may have made to the board library or the SBL code.

    Regards,
    Rahul

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  • In reply to Rahul Prabhu:

    Hi Rahul,

    • I have made some changes to evmK2H_ddr.c file.

                I attached my evmK2H_ddr.c here evmK2H_ddr.c

    •  Added this line  SBL_a15EnableVFP11co(); to sbl_soc.c file

    These are the only changes I have made.

    Regards,

    Mahima Shanbag

  • In reply to mahima shanbag:

    Hi Rahul,

    Thank you for your suggestion.

    Application is running from the NOR flash after setting  the SPI clock to 200 Khz.

    One more thing , we are using  MT25Q_QLKT_U_512_ABB_0 NOR flash in our custom board.

    SO I made below changes 

    1.changed the NOR flash device ID 0xBB18 in Board_flash.h   to 0xBB20.

    • #define BOARD_FLASH_ID_NORN25Q128          0xBB20

    2.In C:\ti\pdk_k2hk_4_0_7\packages\ti\board\src\flash\nor\device\n25q128.h

    • #define NOR_SIZE                    (256U * 65536U)       to      #define NOR_SIZE                    (1024U * 65536U)      /*NOR size is 512Mb*/
    • #define NOR_DEVICE_ID               (0xBB18)  /* Device ID */   to      #define NOR_DEVICE_ID               (0xBB20)     /* Device ID */


    When I run the flash_writer I got below log

    PDK SPI Flash Write

    Opening SPI handle...

    SPI init failed!


    So we replaced it with n25q_128mb_1_8v_65nm which is there in EVM.

    Now we are able to flash through flash_writer.

    But our requirement is to use  MT25Q_QLKT_U_512_ABB_0 NOR flash.

    Is there any dependency? I checked NOR_SECTOR_SIZE  and NOR_PAGE_SIZE which is same as there in EVM.

  • In reply to mahima shanbag:

    Thanks for confirming that the SBL is working when SPI Clock is set to 200 Khz. I am not sure why the DDR code modification is causing this issue as the SBL SPI configuration and the read of the incorrect header doesn`t have anything to do with the DDR setup as the code runs out of MSMC memory as far as I can tell. Only thing that I can think that may be causing this issue is that cache and MMU have not been setup so SPI reads at 1Mhz with no interrupts enabled may be slow. You can try and use CSL_a15EnableCache() after SBL_a15EnableVFP11co(); to see if this can help you get SPI boot going at the default 1Mhz.

    In terms of porting to a new flash ...you need to compare the datasheets for the two flash devices in order to evaluate full list of chnages in instruction set, DEVID/Manufacturer ID and NOR flash geometry. Also make sure that you rebuild the board library and then the SBL so the SBL picks up the changes that you made. The SBL_SPInit calls BOARD_flashOpen underneath, simply changing the header may not work as macros from those header are used in the nor_spi code in the board library.

    We recommend running a read write test to the SPI flash on your board independent of the SBL setup to make sure that the interface on your board is checked out. you can use the flash writer but this only checks limited functionality. Ensure there is no write protect. Connecting a scope to read the first few bytes may also be a good idea to confirm that the right DEVID/ManuID is sent from the flash when the SOC sends the read command.

    Regards,
    Rahul

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  • In reply to Rahul Prabhu:

    Hi Rahul,

    1.I tested by adding this CSL_a15EnableCache() but it didn't make any difference for 1 MHz.

    2.

    I compared the datasheet , found difference in

    • device ID which is 0xBB20 in our case.
    • NOR size [512Mb].

    Made these changes in C:\ti\pdk_k2hk_4_0_7\packages\ti\board\src\flash\nor\device\n25q128.h file and In C:\ti\pdk_k2hk_4_0_7\packages\ti\board\src\flash\include\board_flash.h file and rebuilt the board library and flash_writer.

    when I run the flash_writer, got below log and CCS is hanged

    [C66xx_0]
    *** PDK SPI Flash Writer ***
    Opening SPI handle...
    SPI handle opened!
    Parsing config file and flashing content to SPI NOR...
    Parsed config line, received parameters: filename = MLO, address = 0x0
        Size of MLO is 0x7108
        Loading binary to memory ...
        Finished loading binary to memory!


    It is getting hang at Board_flashWrite() function inside board_flash.c file.

    Regards,

    Mahima Shanbag

  • In reply to mahima shanbag:

    Hi Rahul,
    Thank you .
    MT25Q_QLKT_U_512_ABB_0 NOR flash is working now.

    Regards,
    Mahima Shanbag.

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