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Linux/66AK2H14: load program from linux to DSP

Part Number: 66AK2H14

Tool/software: Linux

Hello everyone.

I'm new to EVMK2H boards. I have some questions about my problem and I hope that somebody helps me!

My main problem is about memory configuration. I wrote a simple code that creates a heap in external memory(DDR3A=2GB) and allocates some memory and it worked in CCS very well (Memory allocation is the last section of my main code), But when I try to load it via mpmcl from linux it gave me -104 error. After I read the below link, I recognize that it needs to change the device tree and MPMconfig.json file in the SDK directory.

I did the same as the link proposed but it did not work in my case! I change the device tree so that the DSP code place in the logical address 0xa0000000 with length 0x40000000 (physical address 0x820000000) and send CMEM to the address 0x860000000. I also changed MPMconfig.json as the attached file and added these lines of codes to my .cfg file so that create a heap. Is my way wrong to change the device tree? and why the linux gave this error in its log?

part of cfg:

var myHeapParams = new HeapMem.Params;
myHeapParams.sectionName = ".bootHeap";
myHeapParams.size = 64;
Program.global.myHeap = HeapMem.create(myHeapParams);

//Memory.defaultHeapInstance = Program.global.myHeap;

Program.sectMap[".bootHeap"] = new Program.SectionSpec();
Program.sectMap[".bootHeap"].loadSegment = "DDR3_DSP_SHARED";

linux error (tail -f /var/log/syslog) :

root@k2hk-evm:~# tail -f /var/log/syslog
Dec 23 18:59:48 k2hk-evm mpmsrv[547]: mpmsrv.c:110:mpm_server: received message of size 84 bytes for cmd 1
Dec 23 18:59:48 k2hk-evm mpmsrv[547]: mpmsrv.c:134:mpm_server: received load command for dsp0 filename /home/root/hello_GenericC66xxDevice.out
Dec 23 18:59:48 k2hk-evm mpmsrv[547]: mpmdlif.c:197:map_and_copy_segment: transport mmap failed for addr 0xa0000000 size 64 (err: No such file or directory)
Dec 23 18:59:48 k2hk-evm mpmsrv[547]: mpmdlif.c:1279:DLIF_allocate: map and copy failed for image /home/root/hello_GenericC66xxDevice.out with addr 0xa0000000, size 0x40
Dec 23 18:59:48 k2hk-evm mpmsrv[547]: mpmdlif.c:1442:DLIF_error: << D L O A D >> ERROR:
Dec 23 18:59:48 k2hk-evm mpmsrv[547]: mpmdlif.c:1445:DLIF_error: Failed to allocate target memory for static executable.
Dec 23 18:59:48 k2hk-evm mpmsrv[547]: mpmdlif.c:864:mpm_dlif_load: Image loading failed for file /home/root/hello_GenericC66xxDevice.out
Dec 23 18:59:48 k2hk-evm mpmsrv[547]: mpmssm.c:510:mpm_load_slave: Image loading failed for dsp0 : image
Dec 23 18:59:48 k2hk-evm mpmsrv[547]: mpmssm.c:419:mpm_ssm_state_error: entered error state for dsp0
Dec 23 18:59:48 k2hk-evm mpmsrv[547]: mpmsrv.c:77:mpm_server: waiting for slave message

device tree:

 

device tree.txt
/dts-v1/;

/ {
	#address-cells = <0x2>;
	#size-cells = <0x2>;
	compatible = "ti,k2hk-evm", "ti,k2hk", "ti,keystone";
	model = "Texas Instruments Keystone 2 Kepler/Hawking EVM";
	interrupt-parent = <0x1>;

	chosen {
	};

	aliases {
		serial0 = "/soc/serial@02530c00";
		spi0 = "/soc/spi@21000400";
		spi1 = "/soc/spi@21000600";
		spi2 = "/soc/spi@21000800";
		rproc0 = "/soc/dsp@10800000";
		rproc1 = "/soc/dsp@11800000";
		rproc2 = "/soc/dsp@12800000";
		rproc3 = "/soc/dsp@13800000";
		rproc4 = "/soc/dsp@14800000";
		rproc5 = "/soc/dsp@15800000";
		rproc6 = "/soc/dsp@16800000";
		rproc7 = "/soc/dsp@17800000";
	};

	memory {
		device_type = "memory";
		reg = <0x0 0x80000000 0x0 0x80000000>;
	};

	interrupt-controller {
		compatible = "arm,cortex-a15-gic";
		#interrupt-cells = <0x3>;
		interrupt-controller;
		reg = <0x0 0x2561000 0x0 0x1000 0x0 0x2562000 0x0 0x2000 0x0 0x2564000 0x0 0x1000 0x0 0x2566000 0x0 0x2000>;
		interrupts = <0x1 0x9 0xf04>;
		linux,phandle = <0x1>;
		phandle = <0x1>;
	};

	timer {
		compatible = "arm,armv7-timer";
		interrupts = <0x1 0xd 0xf08 0x1 0xe 0xf08 0x1 0xb 0xf08 0x1 0xa 0xf08>;
	};

	pmu {
		compatible = "arm,cortex-a15-pmu";
		interrupts = <0x0 0x14 0x1 0x0 0x15 0x1 0x0 0x16 0x1 0x0 0x17 0x1>;
	};

	psci {
		compatible = "arm,psci";
		method = "smc";
		cpu_suspend = <0x84000001>;
		cpu_off = <0x84000002>;
		cpu_on = <0x84000003>;
	};

	soc {
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		compatible = "ti,keystone", "simple-bus";
		interrupt-parent = <0x1>;
		ranges = <0x0 0x0 0x0 0xc0000000>;
		dma-ranges = <0x80000000 0x8 0x0 0x80000000>;

		pll-controller@02310000 {
			compatible = "ti,keystone-pllctrl", "syscon";
			reg = <0x2310000 0x200>;
			linux,phandle = <0x2>;
			phandle = <0x2>;
		};

		power-sleep-controller@02350000 {
			compatible = "syscon", "simple-mfd";
			reg = <0x2350000 0x1000>;

			psc-reset-controller {
				compatible = "ti,k2hk-pscrst", "ti,syscon-reset";
				#reset-cells = <0x1>;
				ti,reset-bits = <0xa3c 0x8 0xa3c 0x8 0x83c 0x8 0x10 0xa40 0x8 0xa40 0x8 0x840 0x8 0x10 0xa44 0x8 0xa44 0x8 0x844 0x8 0x10 0xa48 0x8 0xa48 0x8 0x848 0x8 0x10 0xa4c 0x8 0xa4c 0x8 0x84c 0x8 0x10 0xa50 0x8 0xa50 0x8 0x850 0x8 0x10 0xa54 0x8 0xa54 0x8 0x854 0x8 0x10 0xa58 0x8 0xa58 0x8 0x858 0x8 0x10>;
				linux,phandle = <0x24>;
				phandle = <0x24>;
			};
		};

		device-state-control@02620000 {
			compatible = "ti,keystone-devctrl", "syscon";
			reg = <0x2620000 0x1000>;
			linux,phandle = <0x3>;
			phandle = <0x3>;
		};

		reset-controller {
			compatible = "ti,keystone-reset";
			ti,syscon-pll = <0x2 0xe4>;
			ti,syscon-dev = <0x3 0x328>;
			ti,wdt-list = <0x0>;
		};

		clocks {
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges;

			mainmuxclk@2310108 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,pll-mux-clock";
				clocks = <0x4 0x5>;
				reg = <0x2310108 0x4>;
				bit-shift = <0x17>;
				bit-mask = <0x1>;
				clock-output-names = "mainmuxclk";
				linux,phandle = <0x6>;
				phandle = <0x6>;
			};

			chipclk1 {
				#clock-cells = <0x0>;
				compatible = "fixed-factor-clock";
				clocks = <0x6>;
				clock-div = <0x1>;
				clock-mult = <0x1>;
				clock-output-names = "chipclk1";
				linux,phandle = <0x7>;
				phandle = <0x7>;
			};

			chipclk1rstiso {
				#clock-cells = <0x0>;
				compatible = "fixed-factor-clock";
				clocks = <0x6>;
				clock-div = <0x1>;
				clock-mult = <0x1>;
				clock-output-names = "chipclk1rstiso";
				linux,phandle = <0x9>;
				phandle = <0x9>;
			};

			gemtraceclk@2310120 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,pll-divider-clock";
				clocks = <0x6>;
				reg = <0x2310120 0x4>;
				bit-shift = <0x0>;
				bit-mask = <0x8>;
				clock-output-names = "gemtraceclk";
			};

			chipstmxptclk {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,pll-divider-clock";
				clocks = <0x6>;
				reg = <0x2310164 0x4>;
				bit-shift = <0x0>;
				bit-mask = <0x8>;
				clock-output-names = "chipstmxptclk";
			};

			chipclk12 {
				#clock-cells = <0x0>;
				compatible = "fixed-factor-clock";
				clocks = <0x7>;
				clock-div = <0x2>;
				clock-mult = <0x1>;
				clock-output-names = "chipclk12";
				linux,phandle = <0xe>;
				phandle = <0xe>;
			};

			chipclk13 {
				#clock-cells = <0x0>;
				compatible = "fixed-factor-clock";
				clocks = <0x7>;
				clock-div = <0x3>;
				clock-mult = <0x1>;
				clock-output-names = "chipclk13";
				linux,phandle = <0xb>;
				phandle = <0xb>;
			};

			paclk13 {
				#clock-cells = <0x0>;
				compatible = "fixed-factor-clock";
				clocks = <0x8>;
				clock-div = <0x3>;
				clock-mult = <0x1>;
				clock-output-names = "paclk13";
				linux,phandle = <0xc>;
				phandle = <0xc>;
			};

			chipclk14 {
				#clock-cells = <0x0>;
				compatible = "fixed-factor-clock";
				clocks = <0x7>;
				clock-div = <0x4>;
				clock-mult = <0x1>;
				clock-output-names = "chipclk14";
			};

			chipclk16 {
				#clock-cells = <0x0>;
				compatible = "fixed-factor-clock";
				clocks = <0x7>;
				clock-div = <0x6>;
				clock-mult = <0x1>;
				clock-output-names = "chipclk16";
				linux,phandle = <0xa>;
				phandle = <0xa>;
			};

			chipclk112 {
				#clock-cells = <0x0>;
				compatible = "fixed-factor-clock";
				clocks = <0x7>;
				clock-div = <0xc>;
				clock-mult = <0x1>;
				clock-output-names = "chipclk112";
			};

			chipclk124 {
				#clock-cells = <0x0>;
				compatible = "fixed-factor-clock";
				clocks = <0x7>;
				clock-div = <0x18>;
				clock-mult = <0x1>;
				clock-output-names = "chipclk114";
			};

			chipclk1rstiso13 {
				#clock-cells = <0x0>;
				compatible = "fixed-factor-clock";
				clocks = <0x9>;
				clock-div = <0x3>;
				clock-mult = <0x1>;
				clock-output-names = "chipclk1rstiso13";
				linux,phandle = <0x16>;
				phandle = <0x16>;
			};

			chipclk1rstiso14 {
				#clock-cells = <0x0>;
				compatible = "fixed-factor-clock";
				clocks = <0x9>;
				clock-div = <0x4>;
				clock-mult = <0x1>;
				clock-output-names = "chipclk1rstiso14";
			};

			chipclk1rstiso16 {
				#clock-cells = <0x0>;
				compatible = "fixed-factor-clock";
				clocks = <0x9>;
				clock-div = <0x6>;
				clock-mult = <0x1>;
				clock-output-names = "chipclk1rstiso16";
			};

			chipclk1rstiso112 {
				#clock-cells = <0x0>;
				compatible = "fixed-factor-clock";
				clocks = <0x9>;
				clock-div = <0xc>;
				clock-mult = <0x1>;
				clock-output-names = "chipclk1rstiso112";
				linux,phandle = <0xf>;
				phandle = <0xf>;
			};

			clkmodrst0 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xa>;
				clock-output-names = "modrst0";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
				linux,phandle = <0x10>;
				phandle = <0x10>;
			};

			clkusb {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xa>;
				clock-output-names = "usb";
				reg = <0x2350008 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
				linux,phandle = <0x1b>;
				phandle = <0x1b>;
			};

			clkaemifspi {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xa>;
				clock-output-names = "aemif-spi";
				reg = <0x235000c 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
				linux,phandle = <0x11>;
				phandle = <0x11>;
			};

			clkdebugsstrc {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "debugss-trc";
				reg = <0x2350014 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x1>;
			};

			clktetbtrc {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "tetb-trc";
				reg = <0x2350018 0xb00 0x2350004 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x1>;
			};

			clkpa {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xc>;
				clock-output-names = "pa";
				reg = <0x235001c 0xb00 0x2350008 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x2>;
				linux,phandle = <0xd>;
				phandle = <0xd>;
			};

			clkcpgmac {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xd>;
				clock-output-names = "cpgmac";
				reg = <0x2350020 0xb00 0x2350008 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x2>;
				linux,phandle = <0x36>;
				phandle = <0x36>;
			};

			clksa {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xd>;
				clock-output-names = "sa";
				reg = <0x2350024 0xb00 0x2350008 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x2>;
				linux,phandle = <0x4e>;
				phandle = <0x4e>;
			};

			clkpcie {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xe>;
				clock-output-names = "pcie";
				reg = <0x2350028 0xb00 0x235000c 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x3>;
				linux,phandle = <0x21>;
				phandle = <0x21>;
			};

			clksr {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xf>;
				clock-output-names = "sr";
				reg = <0x2350034 0xb00 0x2350018 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x6>;
			};

			clkgem0 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x7>;
				clock-output-names = "gem0";
				reg = <0x235003c 0xb00 0x2350020 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x8>;
				linux,phandle = <0x23>;
				phandle = <0x23>;
			};

			clkddr30 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xe>;
				clock-output-names = "ddr3-0";
				reg = <0x235005c 0xb00 0x2350040 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x10>;
			};

			clkwdtimer0 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x10>;
				clock-output-names = "timer0";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
				linux,phandle = <0x1d>;
				phandle = <0x1d>;
			};

			clkwdtimer1 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x10>;
				clock-output-names = "timer1";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
			};

			clkwdtimer2 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x10>;
				clock-output-names = "timer2";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
			};

			clkwdtimer3 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x10>;
				clock-output-names = "timer3";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
			};

			clktimer15 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x10>;
				clock-output-names = "timer15";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
				linux,phandle = <0x1e>;
				phandle = <0x1e>;
			};

			clkuart0 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x10>;
				clock-output-names = "uart0";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
				linux,phandle = <0x17>;
				phandle = <0x17>;
			};

			clkuart1 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x10>;
				clock-output-names = "uart1";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
				linux,phandle = <0x18>;
				phandle = <0x18>;
			};

			clkaemif {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x11>;
				clock-output-names = "aemif";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
				linux,phandle = <0x20>;
				phandle = <0x20>;
			};

			clkusim {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x10>;
				clock-output-names = "usim";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
			};

			clki2c {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x10>;
				clock-output-names = "i2c";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
				linux,phandle = <0x19>;
				phandle = <0x19>;
			};

			clkspi {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x11>;
				clock-output-names = "spi";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
				linux,phandle = <0x1a>;
				phandle = <0x1a>;
			};

			clkgpio {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x10>;
				clock-output-names = "gpio";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
				linux,phandle = <0x1f>;
				phandle = <0x1f>;
			};

			clkkeymgr {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x10>;
				clock-output-names = "keymgr";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
			};

			armpllclk@2620370 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,pll-clock";
				clocks = <0x12>;
				clock-output-names = "arm-pll-clk";
				reg = <0x2620370 0x4>;
				reg-names = "control";
			};

			mainpllclk@2310110 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,main-pll-clock";
				clocks = <0x5>;
				reg = <0x2620350 0x4 0x2310110 0x4 0x2310108 0x4>;
				reg-names = "control", "multiplier", "post-divider";
				linux,phandle = <0x4>;
				phandle = <0x4>;
			};

			papllclk@2620358 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,pll-clock";
				clocks = <0x13>;
				clock-output-names = "papllclk";
				reg = <0x2620358 0x4>;
				reg-names = "control";
				linux,phandle = <0x8>;
				phandle = <0x8>;
			};

			ddr3apllclk@2620360 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,pll-clock";
				clocks = <0x14>;
				clock-output-names = "ddr-3a-pll-clk";
				reg = <0x2620360 0x4>;
				reg-names = "control";
			};

			ddr3bpllclk@2620368 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,pll-clock";
				clocks = <0x15>;
				clock-output-names = "ddr-3b-pll-clk";
				reg = <0x2620368 0x4>;
				reg-names = "control";
			};

			clktsip {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xa>;
				clock-output-names = "tsip";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
			};

			clksrio {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x16>;
				clock-output-names = "srio";
				reg = <0x235002c 0xb00 0x2350010 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x4>;
				linux,phandle = <0x51>;
				phandle = <0x51>;
			};

			clkhyperlink0 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xe>;
				clock-output-names = "hyperlink-0";
				reg = <0x2350030 0xb00 0x2350014 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x5>;
				linux,phandle = <0x4f>;
				phandle = <0x4f>;
			};

			clkgem1 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x7>;
				clock-output-names = "gem1";
				reg = <0x2350040 0xb00 0x2350024 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x9>;
				linux,phandle = <0x28>;
				phandle = <0x28>;
			};

			clkgem2 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x7>;
				clock-output-names = "gem2";
				reg = <0x2350044 0xb00 0x2350028 0x400>;
				reg-names = "control", "domain";
				domain-id = <0xa>;
				linux,phandle = <0x2a>;
				phandle = <0x2a>;
			};

			clkgem3 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x7>;
				clock-output-names = "gem3";
				reg = <0x2350048 0xb00 0x235002c 0x400>;
				reg-names = "control", "domain";
				domain-id = <0xb>;
				linux,phandle = <0x2c>;
				phandle = <0x2c>;
			};

			clkgem4 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x7>;
				clock-output-names = "gem4";
				reg = <0x235004c 0xb00 0x2350030 0x400>;
				reg-names = "control", "domain";
				domain-id = <0xc>;
				linux,phandle = <0x2e>;
				phandle = <0x2e>;
			};

			clkgem5 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x7>;
				clock-output-names = "gem5";
				reg = <0x2350050 0xb00 0x2350034 0x400>;
				reg-names = "control", "domain";
				domain-id = <0xd>;
				linux,phandle = <0x30>;
				phandle = <0x30>;
			};

			clkgem6 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x7>;
				clock-output-names = "gem6";
				reg = <0x2350054 0xb00 0x2350038 0x400>;
				reg-names = "control", "domain";
				domain-id = <0xe>;
				linux,phandle = <0x32>;
				phandle = <0x32>;
			};

			clkgem7 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x7>;
				clock-output-names = "gem7";
				reg = <0x2350058 0xb00 0x235003c 0x400>;
				reg-names = "control", "domain";
				domain-id = <0xf>;
				linux,phandle = <0x34>;
				phandle = <0x34>;
			};

			clkddr31 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "ddr3-1";
				reg = <0x2350060 0xb00 0x2350040 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x10>;
			};

			clktac {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "tac";
				reg = <0x2350064 0xb00 0x2350044 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x11>;
			};

			clkrac01 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "rac-01";
				reg = <0x2350068 0xb00 0x2350044 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x11>;
			};

			clkrac23 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "rac-23";
				reg = <0x235006c 0xb00 0x2350048 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x12>;
			};

			clkfftc0 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "fftc-0";
				reg = <0x2350070 0xb00 0x235004c 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x13>;
			};

			clkfftc1 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "fftc-1";
				reg = <0x2350074 0xb00 0x235004c 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x13>;
			};

			clkfftc2 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "fftc-2";
				reg = <0x2350078 0xb00 0x2350050 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x14>;
			};

			clkfftc3 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "fftc-3";
				reg = <0x235007c 0xb00 0x2350050 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x14>;
			};

			clkfftc4 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "fftc-4";
				reg = <0x2350080 0xb00 0x2350050 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x14>;
			};

			clkfftc5 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "fftc-5";
				reg = <0x2350084 0xb00 0x2350050 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x14>;
			};

			clkaif {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "aif";
				reg = <0x2350088 0xb00 0x2350054 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x15>;
			};

			clktcp3d0 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "tcp3d-0";
				reg = <0x235008c 0xb00 0x2350058 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x16>;
			};

			clktcp3d1 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "tcp3d-1";
				reg = <0x2350090 0xb00 0x2350058 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x16>;
			};

			clktcp3d2 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "tcp3d-2";
				reg = <0x2350094 0xb00 0x235005c 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x17>;
			};

			clktcp3d3 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "tcp3d-3";
				reg = <0x2350098 0xb00 0x235005c 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x17>;
			};

			clkvcp0 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "vcp-0";
				reg = <0x235009c 0xb00 0x2350060 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x18>;
			};

			clkvcp1 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "vcp-1";
				reg = <0x23500a0 0xb00 0x2350060 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x18>;
			};

			clkvcp2 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "vcp-2";
				reg = <0x23500a4 0xb00 0x2350060 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x18>;
			};

			clkvcp3 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "vcp-3";
				reg = <0x23500a8 0xb00 0x2350060 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x18>;
			};

			clkvcp4 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "vcp-4";
				reg = <0x23500ac 0xb00 0x2350064 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x19>;
			};

			clkvcp5 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "vcp-5";
				reg = <0x23500b0 0xb00 0x2350064 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x19>;
			};

			clkvcp6 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "vcp-6";
				reg = <0x23500b4 0xb00 0x2350064 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x19>;
			};

			clkvcp7 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "vcp-7";
				reg = <0x23500b8 0xb00 0x2350064 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x19>;
			};

			clkbcp {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "bcp";
				reg = <0x23500bc 0xb00 0x2350068 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x1a>;
			};

			clkdxb {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "dxb";
				reg = <0x23500c0 0xb00 0x235006c 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x1b>;
			};

			clkhyperlink1 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xe>;
				clock-output-names = "hyperlink-1";
				reg = <0x23500c4 0xb00 0x2350070 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x1c>;
				linux,phandle = <0x50>;
				phandle = <0x50>;
			};

			clkxge {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "xge";
				reg = <0x23500c8 0xb00 0x2350074 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x1d>;
				linux,phandle = <0x47>;
				phandle = <0x47>;
			};

			refclksys {
				#clock-cells = <0x0>;
				compatible = "fixed-clock";
				clock-frequency = <0x7530000>;
				clock-output-names = "refclk-sys";
				linux,phandle = <0x5>;
				phandle = <0x5>;
			};

			refclkpass {
				#clock-cells = <0x0>;
				compatible = "fixed-clock";
				clock-frequency = <0x7530000>;
				clock-output-names = "refclk-pass";
				linux,phandle = <0x13>;
				phandle = <0x13>;
			};

			refclkarm {
				#clock-cells = <0x0>;
				compatible = "fixed-clock";
				clock-frequency = <0x7735940>;
				clock-output-names = "refclk-arm";
				linux,phandle = <0x12>;
				phandle = <0x12>;
			};

			refclkddr3a {
				#clock-cells = <0x0>;
				compatible = "fixed-clock";
				clock-frequency = <0x5f5e100>;
				clock-output-names = "refclk-ddr3a";
				linux,phandle = <0x14>;
				phandle = <0x14>;
			};

			refclkddr3b {
				#clock-cells = <0x0>;
				compatible = "fixed-clock";
				clock-frequency = <0x5f5e100>;
				clock-output-names = "refclk-ddr3b";
				linux,phandle = <0x15>;
				phandle = <0x15>;
			};
		};

		serial@02530c00 {
			compatible = "ti,da830-uart", "ns16550a";
			current-speed = <0x1c200>;
			reg-shift = <0x2>;
			reg-io-width = <0x4>;
			reg = <0x2530c00 0x100>;
			clocks = <0x17>;
			interrupts = <0x0 0x115 0x1>;
		};

		serial@02531000 {
			compatible = "ti,da830-uart", "ns16550a";
			current-speed = <0x1c200>;
			reg-shift = <0x2>;
			reg-io-width = <0x4>;
			reg = <0x2531000 0x100>;
			clocks = <0x18>;
			interrupts = <0x0 0x118 0x1>;
		};

		i2c@2530000 {
			compatible = "ti,davinci-i2c";
			reg = <0x2530000 0x400>;
			clock-frequency = <0x186a0>;
			clocks = <0x19>;
			interrupts = <0x0 0x11b 0x1>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;

			dtt@50 {
				compatible = "at,24c1024";
				reg = <0x50>;
			};
		};

		i2c@2530400 {
			compatible = "ti,davinci-i2c";
			reg = <0x2530400 0x400>;
			clock-frequency = <0x186a0>;
			clocks = <0x19>;
			interrupts = <0x0 0x11e 0x1>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
		};

		i2c@2530800 {
			compatible = "ti,davinci-i2c";
			reg = <0x2530800 0x400>;
			clock-frequency = <0x186a0>;
			clocks = <0x19>;
			interrupts = <0x0 0x121 0x1>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
		};

		spi@21000400 {
			compatible = "ti,keystone-spi", "ti,dm6441-spi";
			reg = <0x21000400 0x200>;
			num-cs = <0x4>;
			ti,davinci-spi-intr-line = <0x0>;
			interrupts = <0x0 0x124 0x1>;
			clocks = <0x1a>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;

			n25q128a11@0 {
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				compatible = "Micron,n25q128a11";
				spi-max-frequency = <0x337f980>;
				m25p,fast-read;
				reg = <0x0>;

				partition@0 {
					label = "u-boot-spl";
					reg = <0x0 0x100000>;
					read-only;
				};

				partition@1 {
					label = "misc";
					reg = <0x100000 0xf00000>;
				};
			};
		};

		spi@21000600 {
			compatible = "ti,keystone-spi", "ti,dm6441-spi";
			reg = <0x21000600 0x200>;
			num-cs = <0x4>;
			ti,davinci-spi-intr-line = <0x0>;
			interrupts = <0x0 0x128 0x1>;
			clocks = <0x1a>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
		};

		spi@21000800 {
			compatible = "ti,keystone-spi", "ti,dm6441-spi";
			reg = <0x21000800 0x200>;
			num-cs = <0x4>;
			ti,davinci-spi-intr-line = <0x0>;
			interrupts = <0x0 0x12c 0x1>;
			clocks = <0x1a>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
		};

		usb_phy@2620738 {
			compatible = "ti,keystone-usbphy";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			reg = <0x2620738 0x18>;
			status = "okay";
			linux,phandle = <0x1c>;
			phandle = <0x1c>;
		};

		usb@2680000 {
			compatible = "ti,keystone-dwc3";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			reg = <0x2680000 0x10000>;
			clocks = <0x1b>;
			clock-names = "usb";
			interrupts = <0x0 0x189 0x1>;
			ranges;
			dma-coherent;
			dma-ranges;
			status = "okay";

			dwc3@2690000 {
				compatible = "synopsys,dwc3";
				reg = <0x2690000 0x70000>;
				interrupts = <0x0 0x189 0x1>;
				usb-phy = <0x1c 0x1c>;
				dr_mode = "host";
			};
		};

		wdt@022f0080 {
			compatible = "ti,keystone-wdt", "ti,davinci-wdt";
			reg = <0x22f0080 0x80>;
			clocks = <0x1d>;
		};

		timer@22f0000 {
			compatible = "ti,keystone-timer";
			reg = <0x22f0000 0x80>;
			interrupts = <0x0 0x6e 0x1>;
			clocks = <0x1e>;
		};

		gpio@260bf00 {
			compatible = "ti,keystone-gpio";
			reg = <0x260bf00 0x100>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupts = <0x0 0x78 0x1 0x0 0x79 0x1 0x0 0x7a 0x1 0x0 0x7b 0x1 0x0 0x7c 0x1 0x0 0x7d 0x1 0x0 0x7e 0x1 0x0 0x7f 0x1 0x0 0x80 0x1 0x0 0x81 0x1 0x0 0x82 0x1 0x0 0x83 0x1 0x0 0x84 0x1 0x0 0x85 0x1 0x0 0x86 0x1 0x0 0x87 0x1 0x0 0x88 0x1 0x0 0x89 0x1 0x0 0x8a 0x1 0x0 0x8b 0x1 0x0 0x8c 0x1 0x0 0x8d 0x1 0x0 0x8e 0x1 0x0 0x8f 0x1 0x0 0x90 0x1 0x0 0x91 0x1 0x0 0x92 0x1 0x0 0x93 0x1 0x0 0x94 0x1 0x0 0x95 0x1 0x0 0x96 0x1 0x0 0x97 0x1>;
			clocks = <0x1f>;
			clock-names = "gpio";
			ti,ngpio = <0x20>;
			ti,davinci-gpio-unbanked = <0x20>;
			linux,phandle = <0x52>;
			phandle = <0x52>;
		};

		aemif@21000A00 {
			compatible = "ti,keystone-aemif", "ti,davinci-aemif";
			#address-cells = <0x2>;
			#size-cells = <0x1>;
			clocks = <0x20>;
			clock-names = "aemif";
			clock-ranges;
			reg = <0x21000a00 0x100>;
			ranges = <0x0 0x0 0x30000000 0x10000000 0x1 0x0 0x21000a00 0x100>;

			cs0 {
				#address-cells = <0x2>;
				#size-cells = <0x1>;
				clock-ranges;
				ranges;
				ti,cs-chipselect = <0x0>;
				ti,cs-min-turnaround-ns = <0xc>;
				ti,cs-read-hold-ns = <0x6>;
				ti,cs-read-strobe-ns = <0x17>;
				ti,cs-read-setup-ns = <0x9>;
				ti,cs-write-hold-ns = <0x8>;
				ti,cs-write-strobe-ns = <0x17>;
				ti,cs-write-setup-ns = <0x8>;

				nand@0,0 {
					compatible = "ti,keystone-nand", "ti,davinci-nand";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					reg = <0x0 0x0 0x4000000 0x1 0x0 0x100>;
					ti,davinci-chipselect = <0x0>;
					ti,davinci-mask-ale = <0x2000>;
					ti,davinci-mask-cle = <0x4000>;
					ti,davinci-mask-chipsel = <0x0>;
					nand-ecc-mode = "hw";
					ti,davinci-ecc-bits = <0x4>;
					nand-on-flash-bbt;

					partition@0 {
						label = "u-boot";
						reg = <0x0 0x100000>;
						read-only;
					};

					partition@100000 {
						label = "params";
						reg = <0x100000 0x80000>;
						read-only;
					};

					partition@180000 {
						label = "ubifs";
						reg = <0x180000 0x1fe80000>;
					};
				};
			};
		};

		keystone_irq@26202a0 {
			compatible = "ti,keystone-irq";
			interrupts = <0x0 0x4 0x1>;
			interrupt-controller;
			#interrupt-cells = <0x1>;
			ti,syscon-dev = <0x3 0x2a0>;
			linux,phandle = <0x25>;
			phandle = <0x25>;
		};

		phy@2320000 {
			#phy-cells = <0x0>;
			compatible = "ti,keystone-serdes-pcie";
			reg = <0x2320000 0x4000>;
			link-rate-kbps = <0x4c4b40>;
			num-lanes = <0x2>;
			status = "disabled";
		};

		pcie@21800000 {
			compatible = "ti,keystone-pcie", "snps,dw-pcie";
			clocks = <0x21>;
			clock-names = "pcie";
			#address-cells = <0x3>;
			#size-cells = <0x2>;
			reg = <0x21801000 0x2000 0x21800000 0x1000 0x2620128 0x4>;
			ranges = <0x82000000 0x0 0x50000000 0x50000000 0x0 0x10000000>;
			status = "disabled";
			device_type = "pci";
			num-lanes = <0x2>;
			bus-range = <0x0 0xff>;
			interrupts = <0x0 0x26 0x1>;
			#interrupt-cells = <0x1>;
			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
			interrupt-map = <0x0 0x0 0x0 0x1 0x22 0x0 0x0 0x0 0x0 0x2 0x22 0x1 0x0 0x0 0x0 0x3 0x22 0x2 0x0 0x0 0x0 0x4 0x22 0x3>;

			msi-interrupt-controller {
				interrupt-controller;
				#interrupt-cells = <0x1>;
				interrupt-parent = <0x1>;
				interrupts = <0x0 0x1e 0x1 0x0 0x1f 0x1 0x0 0x20 0x1 0x0 0x21 0x1 0x0 0x22 0x1 0x0 0x23 0x1 0x0 0x24 0x1 0x0 0x25 0x1>;
			};

			legacy-interrupt-controller {
				interrupt-controller;
				#interrupt-cells = <0x1>;
				interrupt-parent = <0x1>;
				interrupts = <0x0 0x1a 0x1 0x0 0x1b 0x1 0x0 0x1c 0x1 0x0 0x1d 0x1>;
				linux,phandle = <0x22>;
				phandle = <0x22>;
			};
		};

		edac@21010000 {
			compatible = "ti,keystone-ddr3-mc-edac";
			reg = <0x21010000 0x200>;
			interrupts = <0x0 0x1c0 0x1>;
			interrupt-parent = <0x1>;
			status = "ok";
		};

		msmram@0c000000 {
			compatible = "mmio-sram";
			reg = <0xc000000 0x600000>;
			ranges = <0x0 0xc000000 0x600000>;
			#address-cells = <0x1>;
			#size-cells = <0x1>;

			sram-mpm@0 {
				compatible = "ti,keystone-dsp-msm-ram";
				reg = <0x0 0x80000>;
			};

			sram-bm@5f0000 {
				reg = <0x5f0000 0x8000>;
			};

			sram-cmem@100000 {
				reg = <0x100000 0x480000>;
				linux,phandle = <0x54>;
				phandle = <0x54>;
			};
		};

		keystone_dsp_gpio@02620240 {
			compatible = "ti,keystone-dsp-gpio";
			gpio-controller;
			#gpio-cells = <0x2>;
			gpio,syscon-dev = <0x3 0x240>;
			linux,phandle = <0x26>;
			phandle = <0x26>;
		};

		keystone_dsp_gpio@2620244 {
			compatible = "ti,keystone-dsp-gpio";
			gpio-controller;
			#gpio-cells = <0x2>;
			gpio,syscon-dev = <0x3 0x244>;
			linux,phandle = <0x29>;
			phandle = <0x29>;
		};

		keystone_dsp_gpio@2620248 {
			compatible = "ti,keystone-dsp-gpio";
			gpio-controller;
			#gpio-cells = <0x2>;
			gpio,syscon-dev = <0x3 0x248>;
			linux,phandle = <0x2b>;
			phandle = <0x2b>;
		};

		keystone_dsp_gpio@262024c {
			compatible = "ti,keystone-dsp-gpio";
			gpio-controller;
			#gpio-cells = <0x2>;
			gpio,syscon-dev = <0x3 0x24c>;
			linux,phandle = <0x2d>;
			phandle = <0x2d>;
		};

		keystone_dsp_gpio@2620250 {
			compatible = "ti,keystone-dsp-gpio";
			gpio-controller;
			#gpio-cells = <0x2>;
			gpio,syscon-dev = <0x3 0x250>;
			linux,phandle = <0x2f>;
			phandle = <0x2f>;
		};

		keystone_dsp_gpio@2620254 {
			compatible = "ti,keystone-dsp-gpio";
			gpio-controller;
			#gpio-cells = <0x2>;
			gpio,syscon-dev = <0x3 0x254>;
			linux,phandle = <0x31>;
			phandle = <0x31>;
		};

		keystone_dsp_gpio@2620258 {
			compatible = "ti,keystone-dsp-gpio";
			gpio-controller;
			#gpio-cells = <0x2>;
			gpio,syscon-dev = <0x3 0x258>;
			linux,phandle = <0x33>;
			phandle = <0x33>;
		};

		keystone_dsp_gpio@262025c {
			compatible = "ti,keystone-dsp-gpio";
			gpio-controller;
			#gpio-cells = <0x2>;
			gpio,syscon-dev = <0x3 0x25c>;
			linux,phandle = <0x35>;
			phandle = <0x35>;
		};

		dsp@10800000 {
			compatible = "ti,k2hk-dsp";
			reg = <0x10800000 0x100000 0x10e00000 0x8000 0x10f00000 0x8000>;
			reg-names = "l2sram", "l1pram", "l1dram";
			label = "dsp0";
			clocks = <0x23>;
			ti,syscon-dev = <0x3 0x40>;
			resets = <0x24 0x0>;
			interrupt-parent = <0x25>;
			interrupts = <0x0 0x8>;
			interrupt-names = "vring", "exception";
			kick-gpio = <0x26 0x1b 0x0>;
			memory-region = <0x27>;
		};

		dsp@11800000 {
			compatible = "ti,k2hk-dsp";
			reg = <0x11800000 0x100000 0x11e00000 0x8000 0x11f00000 0x8000>;
			reg-names = "l2sram", "l1pram", "l1dram";
			label = "dsp1";
			clocks = <0x28>;
			ti,syscon-dev = <0x3 0x44>;
			resets = <0x24 0x1>;
			interrupt-parent = <0x25>;
			interrupts = <0x1 0x9>;
			interrupt-names = "vring", "exception";
			kick-gpio = <0x29 0x1b 0x0>;
			memory-region = <0x27>;
		};

		dsp@12800000 {
			compatible = "ti,k2hk-dsp";
			reg = <0x12800000 0x100000 0x12e00000 0x8000 0x12f00000 0x8000>;
			reg-names = "l2sram", "l1pram", "l1dram";
			label = "dsp2";
			clocks = <0x2a>;
			ti,syscon-dev = <0x3 0x48>;
			resets = <0x24 0x2>;
			interrupt-parent = <0x25>;
			interrupts = <0x2 0xa>;
			interrupt-names = "vring", "exception";
			kick-gpio = <0x2b 0x1b 0x0>;
			memory-region = <0x27>;
		};

		dsp@13800000 {
			compatible = "ti,k2hk-dsp";
			reg = <0x13800000 0x100000 0x13e00000 0x8000 0x13f00000 0x8000>;
			reg-names = "l2sram", "l1pram", "l1dram";
			label = "dsp3";
			clocks = <0x2c>;
			ti,syscon-dev = <0x3 0x4c>;
			resets = <0x24 0x3>;
			interrupt-parent = <0x25>;
			interrupts = <0x3 0xb>;
			interrupt-names = "vring", "exception";
			kick-gpio = <0x2d 0x1b 0x0>;
			memory-region = <0x27>;
		};

		dsp@14800000 {
			compatible = "ti,k2hk-dsp";
			reg = <0x14800000 0x100000 0x14e00000 0x8000 0x14f00000 0x8000>;
			reg-names = "l2sram", "l1pram", "l1dram";
			label = "dsp4";
			clocks = <0x2e>;
			ti,syscon-dev = <0x3 0x50>;
			resets = <0x24 0x4>;
			interrupt-parent = <0x25>;
			interrupts = <0x4 0xc>;
			interrupt-names = "vring", "exception";
			kick-gpio = <0x2f 0x1b 0x0>;
			memory-region = <0x27>;
		};

		dsp@15800000 {
			compatible = "ti,k2hk-dsp";
			reg = <0x15800000 0x100000 0x15e00000 0x8000 0x15f00000 0x8000>;
			reg-names = "l2sram", "l1pram", "l1dram";
			label = "dsp5";
			clocks = <0x30>;
			ti,syscon-dev = <0x3 0x54>;
			resets = <0x24 0x5>;
			interrupt-parent = <0x25>;
			interrupts = <0x5 0xd>;
			interrupt-names = "vring", "exception";
			kick-gpio = <0x31 0x1b 0x0>;
			memory-region = <0x27>;
		};

		dsp@16800000 {
			compatible = "ti,k2hk-dsp";
			reg = <0x16800000 0x100000 0x16e00000 0x8000 0x16f00000 0x8000>;
			reg-names = "l2sram", "l1pram", "l1dram";
			label = "dsp6";
			clocks = <0x32>;
			ti,syscon-dev = <0x3 0x58>;
			resets = <0x24 0x6>;
			interrupt-parent = <0x25>;
			interrupts = <0x6 0xe>;
			interrupt-names = "vring", "exception";
			kick-gpio = <0x33 0x1b 0x0>;
			memory-region = <0x27>;
		};

		dsp@17800000 {
			compatible = "ti,k2hk-dsp";
			reg = <0x17800000 0x100000 0x17e00000 0x8000 0x17f00000 0x8000>;
			reg-names = "l2sram", "l1pram", "l1dram";
			label = "dsp7";
			clocks = <0x34>;
			ti,syscon-dev = <0x3 0x5c>;
			resets = <0x24 0x7>;
			interrupt-parent = <0x25>;
			interrupts = <0x7 0xf>;
			interrupt-names = "vring", "exception";
			kick-gpio = <0x35 0x1b 0x0>;
			memory-region = <0x27>;
		};

		mdio@02090300 {
			compatible = "ti,keystone_mdio", "ti,davinci_mdio";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			reg = <0x2090300 0x100>;
			status = "ok";
			clocks = <0x36>;
			clock-names = "fck";
			bus_freq = <0x2625a0>;

			ethernet-phy@0 {
				compatible = "marvell,88E1111", "ethernet-phy-ieee802.3-c22";
				reg = <0x0>;
				linux,phandle = <0x3a>;
				phandle = <0x3a>;
			};

			ethernet-phy@1 {
				compatible = "marvell,88E1111", "ethernet-phy-ieee802.3-c22";
				reg = <0x1>;
				linux,phandle = <0x3c>;
				phandle = <0x3c>;
			};
		};

		qmss@2a40000 {
			compatible = "ti,keystone-navigator-qmss";
			dma-coherent;
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			clocks = <0xb>;
			ranges;
			queue-range = <0x0 0x4000>;
			linkram0 = <0x100000 0x8000>;
			linkram1 = <0x0 0x10000>;

			qmgrs {
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				ranges;

				qmgr0 {
					managed-queues = <0x0 0x2000>;
					reg = <0x2a40000 0x20000 0x2a06000 0x400 0x2a02000 0x1000 0x2a03000 0x1000 0x23a80000 0x20000 0x2a80000 0x20000>;
					reg-names = "peek", "status", "config", "region", "push", "pop";
				};

				qmgr1 {
					managed-queues = <0x2000 0x2000>;
					reg = <0x2a60000 0x20000 0x2a06400 0x400 0x2a04000 0x1000 0x2a05000 0x1000 0x23aa0000 0x20000 0x2aa0000 0x20000>;
					reg-names = "peek", "status", "config", "region", "push", "pop";
				};
			};

			queue-pools {

				qpend {

					qpend-0 {
						qrange = <0x292 0x8>;
						interrupts = <0x0 0x28 0xf04 0x0 0x29 0xf04 0x0 0x2a 0xf04 0x0 0x2b 0xf04 0x0 0x2c 0xf04 0x0 0x2d 0xf04 0x0 0x2e 0xf04 0x0 0x2f 0xf04>;
					};

					qpend-1 {
						qrange = <0x2200 0x10>;
						interrupts = <0x0 0x30 0xf04 0x0 0x31 0xf04 0x0 0x32 0xf04 0x0 0x33 0xf04 0x0 0x34 0x104 0x0 0x35 0x204 0x0 0x36 0xf04 0x0 0x37 0xf04 0x0 0x38 0xf04 0x0 0x39 0xf04 0x0 0x3a 0xf04 0x0 0x3b 0xf04 0x0 0x3c 0xf04 0x0 0x3d 0xf04 0x0 0x3e 0xf04 0x0 0x3f 0xf04>;
						qalloc-by-id;
					};

					qpend-2 {
						qrange = <0x2210 0x10>;
						interrupts = <0x0 0x40 0xf04 0x0 0x41 0xf04 0x0 0x42 0xf04 0x0 0x3b 0xf04 0x0 0x44 0xf04 0x0 0x45 0xf04 0x0 0x46 0xf04 0x0 0x47 0xf04 0x0 0x48 0xf04 0x0 0x49 0xf04 0x0 0x4a 0xf04 0x0 0x4b 0xf04 0x0 0x4c 0xf04 0x0 0x4d 0xf04 0x0 0x4e 0xf04 0x0 0x4f 0xf04>;
					};
				};

				general-purpose {

					gp-0 {
						qrange = <0xfa0 0x40>;
					};

					netcp-tx {
						qrange = <0x280 0x9>;
						qalloc-by-id;
					};

					netcpx-tx {
						qrange = <0x2230 0x8>;
						qalloc-by-id;
					};
				};

				accumulator {

					acc-low-0 {
						qrange = <0x1e0 0x20>;
						accumulator = <0x0 0x2f 0x10 0x2 0x32>;
						interrupts = <0x0 0xe2 0xf01>;
						multi-queue;
						qalloc-by-id;
					};
				};
			};

			descriptor-regions {
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				ranges;

				region-12 {
					id = <0xc>;
					region-spec = <0x2c00 0x80>;
					link-index = <0x4000>;
				};
			};

			pdsps {
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				ranges;

				pdsp0@0x2a10000 {
					reg = <0x2a10000 0x1000 0x2a0f000 0x100 0x2a0c000 0x3c8 0x2a20000 0x4000>;
					id = <0x0>;
				};
			};
		};

		knav_dmas@0 {
			compatible = "ti,keystone-navigator-dma";
			clocks = <0x8>;
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges;
			ti,navigator-cloud-address = <0x23a80000 0x23a90000 0x23aa0000 0x23ab0000>;

			dma_gbe@0 {
				reg = <0x2004000 0x100 0x2004400 0x120 0x2004800 0x300 0x2004c00 0x120 0x2005000 0x400>;
				reg-names = "global", "txchan", "rxchan", "txsched", "rxflow";
				ti,enable-all;
				linux,phandle = <0x37>;
				phandle = <0x37>;
			};

			dma_xgbe@0 {
				reg = <0x2fa1000 0x100 0x2fa1400 0x200 0x2fa1800 0x200 0x2fa1c00 0x200 0x2fa2000 0x400>;
				reg-names = "global", "txchan", "rxchan", "txsched", "rxflow";
				linux,phandle = <0x48>;
				phandle = <0x48>;
			};
		};

		subsys@2090000 {
			compatible = "syscon";
			reg = <0x2090000 0x100>;
			linux,phandle = <0x38>;
			phandle = <0x38>;
		};

		phy@232a000 {
			compatible = "ti,keystone-serdes-gbe";
			reg = <0x232a000 0x2000>;
			status = "okay";
			link-rate-kbps = <0x1312d0>;
			num-lanes = <0x4>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;

			lane@0 {
				#phy-cells = <0x0>;
				reg = <0x0>;
				status = "ok";
				control-rate = <0x2>;
				rx-start = <0x7 0x5>;
				rx-force = <0x1 0x1>;
				tx-coeff = <0x0 0x0 0x0 0xc 0x4>;
				linux,phandle = <0x39>;
				phandle = <0x39>;
			};

			lane@1 {
				#phy-cells = <0x0>;
				reg = <0x1>;
				status = "ok";
				control-rate = <0x2>;
				rx-start = <0x7 0x5>;
				rx-force = <0x1 0x1>;
				tx-coeff = <0x0 0x0 0x0 0xc 0x4>;
				linux,phandle = <0x3b>;
				phandle = <0x3b>;
			};

			lane@2 {
				#phy-cells = <0x0>;
				reg = <0x2>;
				status = "disabled";
				control-rate = <0x2>;
				rx-start = <0x7 0x5>;
				rx-force = <0x1 0x1>;
				tx-coeff = <0x0 0x0 0x0 0xc 0x4>;
				linux,phandle = <0x3d>;
				phandle = <0x3d>;
			};

			lane@3 {
				#phy-cells = <0x0>;
				reg = <0x3>;
				status = "disabled";
				control-rate = <0x2>;
				rx-start = <0x7 0x5>;
				rx-force = <0x1 0x1>;
				tx-coeff = <0x0 0x0 0x0 0xc 0x4>;
				linux,phandle = <0x3e>;
				phandle = <0x3e>;
			};
		};

		netcp@2000000 {
			reg = <0x2620110 0x8>;
			reg-names = "efuse";
			compatible = "ti,netcp-1.0";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges = <0x0 0x2000000 0x100000>;
			clocks = <0xd 0x36 0xe>;
			clock-names = "pa_clk", "ethss_clk", "cpts";
			dma-coherent;
			ti,navigator-dmas = <0x37 0x16 0x37 0x17 0x37 0x8 0x37 0x18 0x37 0x19 0x37 0x0 0x37 0x1 0x37 0x2 0x37 0x3 0x37 0x4 0x37 0x5 0x37 0x1f 0x37 0x6>;
			ti,navigator-dma-names = "netrx0", "netrx1", "nettx", "netrx2", "netrx3", "pa-cl0", "pa-cl1", "pa-cl2", "pa-cl3", "pa-cl4", "pa-cl5", "pa-cmd-rsp", "sa-tx0";

			netcp-devices {
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				ranges;

				gbe@90000 {
					label = "netcp-gbe";
					compatible = "ti,netcp-gbe";
					syscon-subsys = <0x38>;
					reg = <0x90100 0x200 0x90400 0x200 0x90800 0x700>;
					tx-queue = <0x288>;
					tx-channel = "nettx";

					interfaces {

						interface-0 {
							phys = <0x39>;
							slave-port = <0x0>;
							link-interface = <0x1>;
							phy-handle = <0x3a>;
							linux,phandle = <0x3f>;
							phandle = <0x3f>;
						};

						interface-1 {
							phys = <0x3b>;
							slave-port = <0x1>;
							link-interface = <0x1>;
							phy-handle = <0x3c>;
							linux,phandle = <0x42>;
							phandle = <0x42>;
						};
					};

					secondary-slave-ports {

						port-2 {
							phys = <0x3d>;
							slave-port = <0x2>;
							link-interface = <0x2>;
						};

						port-3 {
							phys = <0x3e>;
							slave-port = <0x3>;
							link-interface = <0x2>;
						};
					};
				};

				pa@0 {
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					label = "netcp-pa";
					compatible = "ti,netcp-pa";
					reg = <0x0 0x60 0x400 0x10 0x500 0x40 0x604 0x4 0x1000 0x600 0x3000 0x600 0x6000 0x100 0x10000 0x30000 0x40000 0x8000>;
					mac-lut-ranges = <0x0 0x2b 0x38 0x3f>;
					ip-lut-ranges = <0x3d 0x3f>;
					rx-route = <0x2200 0x16>;
					tx-cmd-pool = <0x100 0xc>;
					rx-cmd-rsp-pool = <0x100 0xc>;
					rx-cmd-rsp-chan = "pa-cmd-rsp";
					rx-cmd-rsp-queue-depth = <0x80 0x20 0x0 0x0>;
					rx-cmd-rsp-buffer-size = <0x80 0x200 0x0 0x0>;

					interfaces {

						interface-0 {
							slave-port = <0x0>;
							linux,phandle = <0x40>;
							phandle = <0x40>;
						};

						interface-1 {
							slave-port = <0x1>;
							linux,phandle = <0x43>;
							phandle = <0x43>;
						};
					};

					clusters {
						#address-cells = <0x1>;
						#size-cells = <0x0>;

						cluster@0 {
							reg = <0x0>;
							tx-queue = <0x280>;
							tx-channel = "pa-cl0";
						};

						cluster@1 {
							reg = <0x1>;
							tx-queue = <0x281>;
							tx-channel = "pa-cl1";
						};

						cluster@5 {
							reg = <0x5>;
							tx-queue = <0x285>;
							tx-channel = "pa-cl5";
						};
					};
				};

				sa@c0000 {
					label = "netcp-sa";
					multi-interface;
					natt-port = <0x0>;
					tx-submit-queue = <0x286>;

					interfaces {

						interface-0 {
							slave-port = <0x0>;
							ti,tx-channel = "sa-tx0";
							linux,phandle = <0x41>;
							phandle = <0x41>;
						};

						interface-1 {
							slave-port = <0x1>;
							ti,tx-channel = "sa-tx0";
							linux,phandle = <0x44>;
							phandle = <0x44>;
						};
					};
				};
			};

			netcp-interfaces {

				interface-0 {
					rx-channel = "netrx0";
					rx-pool = <0x400 0xc>;
					tx-pool = <0x400 0xc>;
					rx-queue-depth = <0x80 0x80 0x0 0x0>;
					rx-buffer-size = <0x5ee 0x1000 0x0 0x0>;
					rx-queue = <0x2200>;
					tx-completion-queue = <0x2202>;
					efuse-mac = <0x1>;
					netcp-gbe = <0x3f>;
					netcp-pa = <0x40>;
					netcp-sa = <0x41>;
				};

				interface-1 {
					rx-channel = "netrx1";
					rx-pool = <0x400 0xc>;
					tx-pool = <0x400 0xc>;
					rx-queue-depth = <0x80 0x80 0x0 0x0>;
					rx-buffer-size = <0x5ee 0x1000 0x0 0x0>;
					rx-queue = <0x2201>;
					tx-completion-queue = <0x2203>;
					efuse-mac = <0x0>;
					local-mac-address = [02 18 31 7e 3e 6f];
					netcp-gbe = <0x42>;
					netcp-pa = <0x43>;
					netcp-sa = <0x44>;
				};
			};
		};

		subsys@2f00000 {
			status = "disabled";
			compatible = "syscon";
			reg = <0x2f00000 0x100>;
			linux,phandle = <0x45>;
			phandle = <0x45>;
		};

		pcsr@2f00600 {
			status = "disabled";
			compatible = "syscon";
			reg = <0x2f00600 0x100>;
			linux,phandle = <0x46>;
			phandle = <0x46>;
		};

		phy@231e000 {
			compatible = "ti,keystone-serdes-xgbe";
			reg = <0x231e000 0x2000>;
			status = "disabled";
			link-rate-kbps = <0x9d5b34>;
			num-lanes = <0x2>;
			syscon-peripheral = <0x45>;
			syscon-link = <0x46>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;

			lane@0 {
				#phy-cells = <0x0>;
				reg = <0x0>;
				status = "ok";
				control-rate = <0x0>;
				rx-start = <0x7 0x5>;
				rx-force = <0x1 0x1>;
				tx-coeff = <0x2 0x0 0x0 0xc 0x4>;
				linux,phandle = <0x49>;
				phandle = <0x49>;
			};

			lane@1 {
				#phy-cells = <0x0>;
				reg = <0x1>;
				status = "ok";
				control-rate = <0x0>;
				rx-start = <0x7 0x5>;
				rx-force = <0x1 0x1>;
				tx-coeff = <0x2 0x0 0x0 0xc 0x4>;
				linux,phandle = <0x4a>;
				phandle = <0x4a>;
			};
		};

		netcp@2f00000 {
			status = "disabled";
			compatible = "ti,netcp-1.0";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges;
			clocks = <0x47 0xe>;
			clock-names = "xge_clk", "cpts";
			dma-coherent;
			ti,navigator-dmas = <0x48 0x0 0x48 0x8 0x48 0x0>;
			ti,navigator-dma-names = "xnetrx0", "xnetrx1", "xnettx";

			netcp-devices {
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				ranges;

				xgbe@0x2f00000 {
					label = "netcp-xgbe";
					compatible = "ti,netcp-xgbe";
					syscon-subsys = <0x45>;
					syscon-pcsr = <0x46>;
					reg = <0x2f00100 0x200 0x2f01000 0xb00>;
					tx-queue = <0x2230>;
					tx-channel = "xnettx";

					interfaces {

						interface-0 {
							phys = <0x49>;
							slave-port = <0x0>;
							link-interface = <0xb>;
							linux,phandle = <0x4b>;
							phandle = <0x4b>;
						};

						interface-1 {
							phys = <0x4a>;
							slave-port = <0x1>;
							link-interface = <0xb>;
							linux,phandle = <0x4c>;
							phandle = <0x4c>;
						};
					};
				};
			};

			netcp-interfaces {

				interface-0 {
					rx-channel = "xnetrx0";
					rx-pool = <0x800 0xc>;
					tx-pool = <0x400 0xc>;
					rx-queue-depth = <0x400 0x400 0x40 0x0 0x0>;
					rx-buffer-size = <0x600 0x1000 0x0 0x0>;
					rx-queue = <0x2204>;
					tx-completion-queue = <0x2206>;
					efuse-mac = <0x0>;
					netcp-xgbe = <0x4b>;
				};

				interface-1 {
					rx-channel = "xnetrx1";
					rx-pool = <0x800 0xc>;
					tx-pool = <0x400 0xc>;
					rx-queue-depth = <0x400 0x400 0x0 0x0>;
					rx-buffer-size = <0x600 0x1000 0x0 0x0>;
					rx-queue = <0x2205>;
					tx-completion-queue = <0x2207>;
					efuse-mac = <0x0>;
					netcp-xgbe = <0x4c>;
				};
			};
		};

		subsys@20c0000 {
			compatible = "simple-bus";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges = <0x0 0x20c0000 0x40000>;
			dma-coherent;
			dma-ranges;

			subsys@0 {
				compatible = "syscon";
				reg = <0x0 0x100>;
				linux,phandle = <0x4d>;
				phandle = <0x4d>;
			};

			hwrng@24000 {
				compatible = "ti,keystone-rng";
				reg = <0x24000 0x1000>;
				ti,syscon-sa-cfg = <0x4d>;
				clocks = <0x4e>;
				clock-names = "fck";
			};

			crypto@0 {
				compatible = "ti,netcp-sa-crypto";
				syscon-subsys = <0x4d>;
				clocks = <0x4e>;
				clock-names = "fck";
				ti,navigator-dmas = <0x37 0x1a 0x37 0x6>;
				ti,navigator-dma-names = "crypto-rx", "crypto-tx";
				ti,rx-channel = "crypto-rx";
				ti,rx-queue-depth = <0x100 0x40 0x0 0x0>;
				ti,rx-compl-queue = <0x2208>;
				ti,rx-pool = <0x200 0xc>;
				ti,tx-channel = "crypto-tx";
				ti,tx-queue-depth = <0x100>;
				ti,tx-completion-queue = <0x2209>;
				ti,tx-pool = <0x200 0xc>;
				ti,tx-submit-queue = <0x286>;
				ti,sc-id = <0x7000 0x71ff>;
			};
		};

		dspmem@a0000000 {
			compatible = "ti,keystone-dsp-mem";
			reg = <0xa0000000 0x40000000>;
		};

		mpax {
			compatible = "ti,uio-module-drv";
			mem = <0xbc00000 0xa00>;
		};

		edma3 {
			compatible = "ti,uio-module-drv";
			mem = <0x2700000 0xc0000>;
		};

		secmgr {
			compatible = "ti,uio-module-drv";
			mem = <0x2500100 0x4>;
		};

		qmss {
			compatible = "ti,uio-module-drv";
			mem = <0x2a00000 0x100000 0x23a00000 0x200000>;
		};

		qpend0 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x2c 0xf04>;
			interrupt-mode = <0x1>;

			cfg-params {
				ti,qm-queue = <0x296>;
			};
		};

		qpend1 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x2d 0xf04>;
			interrupt-mode = <0x1>;

			cfg-params {
				ti,qm-queue = <0x297>;
			};
		};

		qpend2 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x2e 0xf04>;
			interrupt-mode = <0x1>;

			cfg-params {
				ti,qm-queue = <0x298>;
			};
		};

		qpend3 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x2f 0xf04>;
			interrupt-mode = <0x1>;

			cfg-params {
				ti,qm-queue = <0x299>;
			};
		};

		cic2_out32 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1c3 0xf01>;
		};

		cic2_out33 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1c4 0xf01>;
		};

		cic2_out34 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1c5 0xf01>;
		};

		cic2_out35 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1c6 0xf01>;
		};

		cic2_out36 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1c7 0xf01>;
		};

		cic2_out37 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1c8 0xf01>;
		};

		cic2_out38 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1c9 0xf01>;
		};

		cic2_out39 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1ca 0xf01>;
		};

		cic2_out40 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1cb 0xf01>;
		};

		cic2_out41 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1cc 0xf01>;
		};

		cic2_out42 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1cd 0xf01>;
		};

		cic2_out43 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1ce 0xf01>;
		};

		cic2_out44 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1cf 0xf01>;
		};

		cic2_out45 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1d0 0xf01>;
		};

		cic2_out46 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1d1 0xf01>;
		};

		cic2_out47 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1d2 0xf01>;
		};

		cic2_out18 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1d3 0xf01>;
		};

		cic2_out19 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1d4 0xf01>;
		};

		cic2_out22 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1d5 0xf01>;
		};

		cic2_out23 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1d6 0xf01>;
		};

		cic2_out50 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1d7 0xf01>;
		};

		cic2_out51 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1d8 0xf01>;
		};

		cic2_out66 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1d9 0xf01>;
		};

		cic2_out67 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1da 0xf01>;
		};

		hyperlink0 {
			compatible = "ti,uio-module-drv";
			mem = <0x21400000 0x1000 0x40000000 0x10000000 0x231a000 0x2000>;
			clocks = <0x4f>;
			interrupts = <0x0 0x183 0x101>;

			cfg-params {
				ti,serdes_refclk_khz = <0x4c4b4>;
				ti,serdes_maxserrate_khz = <0x5f5e10>;
				ti,serdes_lanerate = "half";
				ti,serdes_numlanes = <0x4>;
				ti,serdes_c1 = <0x4 0x4 0x4 0x4>;
				ti,serdes_c2 = <0x0 0x0 0x0 0x0>;
				ti,serdes_cm = <0x0 0x0 0x0 0x0>;
				ti,serdes_tx_att = <0xc 0xc 0xc 0xc>;
				ti,serdes_tx_vreg = <0x4 0x4 0x4 0x4>;
				ti,serdes_rx_att = <0xb 0xb 0xb 0xb>;
				ti,serdes_rx_boost = <0x3 0x3 0x3 0x3>;
			};
		};

		hyperlink1 {
			compatible = "ti,uio-module-drv";
			mem = <0x21400000 0x1000 0x28000000 0x8000000 0x231c000 0x2000>;
			clocks = <0x50>;
			interrupts = <0x0 0x184 0x101>;

			cfg-params {
				ti,serdes_refclk_khz = <0x4c4b4>;
				ti,serdes_maxserrate_khz = <0x5f5e10>;
				ti,serdes_lanerate = "half";
				ti,serdes_numlanes = <0x4>;
				ti,serdes_c1 = <0x4 0x4 0x4 0x4>;
				ti,serdes_c2 = <0x0 0x0 0x0 0x0>;
				ti,serdes_cm = <0x0 0x0 0x0 0x0>;
				ti,serdes_tx_att = <0xc 0xc 0xc 0xc>;
				ti,serdes_tx_vreg = <0x4 0x4 0x4 0x4>;
				ti,serdes_rx_att = <0xb 0xb 0xb 0xb>;
				ti,serdes_rx_boost = <0x3 0x3 0x3 0x3>;
			};
		};

		srio {
			compatible = "ti,uio-module-drv";
			mem = <0x232c000 0x2000 0x2900000 0x40000 0x232c000 0x2000>;
			clocks = <0x51>;
			interrupts = <0x0 0x9a 0xf01>;
		};
	};

	cpus {
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		interrupt-parent = <0x1>;

		cpu@0 {
			compatible = "arm,cortex-a15";
			device_type = "cpu";
			reg = <0x0>;
		};

		cpu@1 {
			compatible = "arm,cortex-a15";
			device_type = "cpu";
			reg = <0x1>;
		};

		cpu@2 {
			compatible = "arm,cortex-a15";
			device_type = "cpu";
			reg = <0x2>;
		};

		cpu@3 {
			compatible = "arm,cortex-a15";
			device_type = "cpu";
			reg = <0x3>;
		};
	};

	reserved-memory {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		ranges;

		dsp_common_cma_pool@81f800000 {
			compatible = "shared-dma-pool";
			reg = <0x8 0x1f800000 0x0 0x800000>;
			reusable;
			status = "okay";
			linux,phandle = <0x27>;
			phandle = <0x27>;
		};

		dsp_common_mpm_pool@820000000 {
			compatible = "shared-dma-pool";
			reg = <0x8 0x20000000 0x0 0x40000000>;
			no-map;
			status = "okay";
		};

		cmem_block_mem@860000000 {
			reg = <0x8 0x60000000 0x0 0x20000000>;
			no-map;
			status = "okay";
			linux,phandle = <0x53>;
			phandle = <0x53>;
		};
	};

	leds {
		compatible = "gpio-leds";

		debug1_1 {
			label = "keystone:green:debug1";
			gpios = <0x52 0xc 0x0>;
		};

		debug1_2 {
			label = "keystone:red:debug1";
			gpios = <0x52 0xd 0x0>;
		};

		debug2 {
			label = "keystone:blue:debug2";
			gpios = <0x52 0xe 0x0>;
		};

		debug3 {
			label = "keystone:blue:debug3";
			gpios = <0x52 0xf 0x0>;
		};
	};

	cmem {
		compatible = "ti,cmem";
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		#pool-size-cells = <0x2>;
		status = "okay";

		cmem_block@0 {
			reg = <0x0>;
			memory-region = <0x53>;
			cmem-buf-pools = <0x1 0x0 0x18000000>;
		};

		cmem_block@1 {
			reg = <0x1>;
			sram = <0x54>;
		};
	};
};

  • Hi,

    I am looking into this. I will post my feedback as soon as I go through the shared info.

    Best Regards,
    Yordan
  • Hi,

    Can you try adding:
    &dsp0 {
    memory-region = <&dsp_common_cma_pool>;
    };

    Or just memory-region in your dsp nodes?

    Best Regards,
    Yordan
  • Hi Yordan. tnx for your reply.
    Do yo mean that I add
    &dsp0 {
    memory-region = <&dsp_common_cma_pool>;
    };

    to the end of device tree and compile it?
  • This is one option. Another one is to make the following modification:
    dsp@10800000 {
    compatible = "ti,k2hk-dsp";
    reg = <0x10800000 0x100000 0x10e00000 0x8000 0x10f00000 0x8000>;
    reg-names = "l2sram", "l1pram", "l1dram";
    label = "dsp0";
    clocks = <0x23>;
    ti,syscon-dev = <0x3 0x40>;
    resets = <0x24 0x0>;
    interrupt-parent = <0x25>;
    interrupts = <0x0 0x8>;
    interrupt-names = "vring", "exception";
    kick-gpio = <0x26 0x1b 0x0>;
    - memory-region = <0x27>;
    + memory-region = <&dsp_common_cma_pool>;
    };
    Best Regards,
    Yordan
  • Hi again dear Yordan.

    I did what you told, but I got this error:

    ERROR (phandle_references): Reference to non-existent node or label "dsp_common_cma_pool"

    ERROR: Input tree has errors, aborting (use -f to force output)



    These lines of device tree show the extanal memory (I think):
    dsp_common_cma_pool@81f800000 {
    compatible = "shared-dma-pool";
    reg = <0x8 0x1f800000 0x0 0x800000>;
    reusable;
    status = "okay";
    linux,phandle = <0x27>;
    phandle = <0x27>;
    };

    dsp_common_mpm_pool@820000000 {
    compatible = "shared-dma-pool";
    reg = <0x8 0x20000000 0x0 0x40000000>;
    no-map;
    status = "okay";
    };
    and these below part show dsp0 node memory definition:
    dsp@10800000 {
    compatible = "ti,k2hk-dsp";
    reg = <0x10800000 0x100000 0x10e00000 0x8000 0x10f00000 0x8000>;
    reg-names = "l2sram", "l1pram", "l1dram";
    label = "dsp0";
    clocks = <0x23>;
    ti,syscon-dev = <0x3 0x40>;
    resets = <0x24 0x0>;
    interrupt-parent = <0x25>;
    interrupts = <0x0 0x8>;
    interrupt-names = "vring", "exception";
    kick-gpio = <0x26 0x1b 0x0>;
    memory-region = <0x27>;
    };
    as you can see 0x27 is pointing to dsp_common_cma_pool but I want to use dsp_common_mpm_pool which it does not have linux,phandle and phandle . I think the problem is here! What do you think? and If you probably are agree with me, how can I identify these part of memory for using so that mpmcl dose not fail?

  • Hi,

    as you can see 0x27 is pointing to dsp_common_cma_pool but I want to use dsp_common_mpm_pool which it does not have linux,phandle and phandle . I think the problem is here! What do you think?


    I think you're correct.

    Ok, this is because you use a single dts file and put all board configurations in it.
    Have a look how EVMK2H dts files are structured, you have:
    keystone.dtsi
    k2hk-evm-cmem.dtsi
    keystone-k2hk.dtsi
    keystone-k2hk-evm.dts

    You can check the structure. You should be able to point the mpm-pool node, like memory-region = <&dsp_common_mpm_pool>, you have to figure out where it should be located, I think it should be outside the "/ {" as done in keystone-k2hk.dts:
    &dsp0 {
    memory-region = <&dsp_common_cma_pool>;
    };

    &dsp1 {
    memory-region = <&dsp_common_cma_pool>;
    };

    &dsp2 {
    memory-region = <&dsp_common_cma_pool>;
    };

    Best Regards,
    Yordan
  • Hi Yordan. Tnx for your suggestion. I will try it and similar ways and will notify you of the results. 

    Thank you very much.

  • Hi Yordan.

    In the last 2 days, I did lots of test on my board until I arrived some answers. First  I changed my platform  like the below image, and then I defined 1GB memory for DSPs in the device tree with changing the dsp_common_mpm_pool, mpm_mem in keystone-k2hk-evm.dts file and cmem_block_mem_0 in k2hk-evm-cmem.dtsi. After that, I compile the new device tree and load it to the proper directory for loading on the board. But when I create a heap in the DSPs memory on DDR3, it gave me below error:


    root@k2hk-evm:~# mpmcl reset dsp0 && mpmcl load dsp0 hello_GenericC66xxDevice.out && mpmcl run dsp0
    reset succeeded
    load failed (error: -104)
    root@k2hk-evm:~# tail -f /var/log/syslog
    Dec 23 14:23:50 k2hk-evm mpmsrv[525]: mpmsrv.c:110:mpm_server: received message of size 84 bytes for cmd 1
    Dec 23 14:23:50 k2hk-evm mpmsrv[525]: mpmsrv.c:134:mpm_server: received load command for dsp0 filename /home/root/hello_GenericC66xxDevice.out
    Dec 23 14:23:50 k2hk-evm mpmsrv[525]: mpmdlif.c:197:map_and_copy_segment: transport mmap failed for addr 0xa0000000 size 511705088 (err: No such file or directory)
    Dec 23 14:23:50 k2hk-evm mpmsrv[525]: mpmdlif.c:1279:DLIF_allocate: map and copy failed for image /home/root/hello_GenericC66xxDevice.out with addr 0xa0000000, size 0x1e800000
    Dec 23 14:23:50 k2hk-evm mpmsrv[525]: mpmdlif.c:1442:DLIF_error: << D L O A D >> ERROR:
    Dec 23 14:23:50 k2hk-evm mpmsrv[525]: mpmdlif.c:1445:DLIF_error: Failed to allocate target memory for static executable.
    Dec 23 14:23:50 k2hk-evm mpmsrv[525]: mpmdlif.c:864:mpm_dlif_load: Image loading failed for file /home/root/hello_GenericC66xxDevice.out
    Dec 23 14:23:50 k2hk-evm mpmsrv[525]: mpmssm.c:510:mpm_load_slave: Image loading failed for dsp0 : image
    Dec 23 14:23:50 k2hk-evm mpmsrv[525]: mpmssm.c:419:mpm_ssm_state_error: entered error state for dsp0
    Dec 23 14:23:50 k2hk-evm mpmsrv[525]: mpmsrv.c:77:mpm_server: waiting for slave message

    k2hk-evm-cmem.dtsi.txt
    / {
    	reserved-memory {
    
    		cmem_block_mem_0: cmem_block_mem@870000000 {
    			reg = <0x00000008 0x70000000 0x00000000 0x10000000>;
    			no-map;
    			status = "okay";
    		};
    	};
    
    	cmem {
    		compatible = "ti,cmem";
    		#address-cells = <1>;
    		#size-cells = <0>;
    
    		#pool-size-cells = <2>;
    
    		status = "okay";
    
    		cmem_block_0: cmem_block@0 {
    			reg = <0>;
    			memory-region = <&cmem_block_mem_0>;
    			cmem-buf-pools = <1 0x00000000 0x10000000>;
    		};
    
    		cmem_block_1: cmem_block@1 {
    			reg = <1>;
    			sram = <&sram_cmem>;
    		};
    	};
    };
    
    &msm_ram {
    	sram_cmem: sram-cmem@100000 {
    		reg = <0x100000 0x480000>;
    	};
    };
    

    keystone-k2hk-evm.dts.txt
    /*
     * Copyright 2013-2014 Texas Instruments, Inc.
     *
     * Keystone 2 Kepler/Hawking EVM device tree
     *
     * This program is free software; you can redistribute it and/or modify
     * it under the terms of the GNU General Public License version 2 as
     * published by the Free Software Foundation.
     */
    /dts-v1/;
    
    #include "keystone.dtsi"
    #include "keystone-k2hk.dtsi"
    
    / {
    	compatible =  "ti,k2hk-evm", "ti,k2hk", "ti,keystone";
    	model = "Texas Instruments Keystone 2 Kepler/Hawking EVM";
    
    	reserved-memory {
    		#address-cells = <2>;
    		#size-cells = <2>;
    		ranges;
    
    		dsp_common_cma_pool: dsp_common_cma_pool@81f800000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
    			reusable;
    			status = "okay";
    		};
    
    		dsp_common_mpm_pool: dsp_common_mpm_pool@820000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x00000008 0x20000000 0x00000000 0x40000000>;
    			no-map;
    			status = "okay";
    		};
    	};
    
    	soc {
    		clocks {
    			refclksys: refclksys {
    				#clock-cells = <0>;
    				compatible = "fixed-clock";
    				clock-frequency = <122880000>;
    				clock-output-names = "refclk-sys";
    			};
    
    			refclkpass: refclkpass {
    				#clock-cells = <0>;
    				compatible = "fixed-clock";
    				clock-frequency = <122880000>;
    				clock-output-names = "refclk-pass";
    			};
    
    			refclkarm: refclkarm {
    				#clock-cells = <0>;
    				compatible = "fixed-clock";
    				clock-frequency = <125000000>;
    				clock-output-names = "refclk-arm";
    			};
    
    			refclkddr3a: refclkddr3a {
    				#clock-cells = <0>;
    				compatible = "fixed-clock";
    				clock-frequency = <100000000>;
    				clock-output-names = "refclk-ddr3a";
    			};
    
    			refclkddr3b: refclkddr3b {
    				#clock-cells = <0>;
    				compatible = "fixed-clock";
    				clock-frequency = <100000000>;
    				clock-output-names = "refclk-ddr3b";
    			};
    		};
    
    		ddr3edac: edac@21010000 {
    			status = "ok";
    		};
    
    		mpm_mem: dspmem@a0000000 {
    			compatible = "ti,keystone-dsp-mem";
    			reg = <0xa0000000 0x40000000>;
    		};
    	};
    
    	leds {
    		compatible = "gpio-leds";
    		debug1_1 {
    			label = "keystone:green:debug1";
    			gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; /* 12 */
    		};
    
    		debug1_2 {
    			label = "keystone:red:debug1";
    			gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; /* 13 */
    		};
    
    		debug2 {
    			label = "keystone:blue:debug2";
    			gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; /* 14 */
    		};
    
    		debug3 {
    			label = "keystone:blue:debug3";
    			gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; /* 15 */
    		};
    	};
    };
    
    &usb_phy {
    	status = "okay";
    };
    
    &keystone_usb0 {
    	status = "okay";
    };
    
    &usb0 {
    	dr_mode = "host";
    };
    
    &aemif {
    	cs0 {
    		#address-cells = <2>;
    		#size-cells = <1>;
    		clock-ranges;
    		ranges;
    
    		ti,cs-chipselect = <0>;
    		/* all timings in nanoseconds */
    		ti,cs-min-turnaround-ns = <12>;
    		ti,cs-read-hold-ns = <6>;
    		ti,cs-read-strobe-ns = <23>;
    		ti,cs-read-setup-ns = <9>;
    		ti,cs-write-hold-ns = <8>;
    		ti,cs-write-strobe-ns = <23>;
    		ti,cs-write-setup-ns = <8>;
    
    		nand@0,0 {
    			compatible = "ti,keystone-nand","ti,davinci-nand";
    			#address-cells = <1>;
    			#size-cells = <1>;
    			reg = <0 0 0x4000000
    			       1 0 0x0000100>;
    
    			ti,davinci-chipselect = <0>;
    			ti,davinci-mask-ale = <0x2000>;
    			ti,davinci-mask-cle = <0x4000>;
    			ti,davinci-mask-chipsel = <0>;
    			nand-ecc-mode = "hw";
    			ti,davinci-ecc-bits = <4>;
    			nand-on-flash-bbt;
    
    			partition@0 {
    				label = "u-boot";
    				reg = <0x0 0x100000>;
    				read-only;
    			};
    
    			partition@100000 {
    				label = "params";
    				reg = <0x100000 0x80000>;
    				read-only;
    			};
    
    			partition@180000 {
    				label = "ubifs";
    				reg = <0x180000 0x1fe80000>;
    			};
    		};
    	};
    };
    
    &i2c0 {
    	dtt@50 {
    		compatible = "at,24c1024";
    		reg = <0x50>;
    	};
    };
    
    &spi0 {
    	nor_flash: n25q128a11@0 {
    		#address-cells = <1>;
    		#size-cells = <1>;
    		compatible = "Micron,n25q128a11";
    		spi-max-frequency = <54000000>;
    		m25p,fast-read;
    		reg = <0>;
    
    		partition@0 {
    			label = "u-boot-spl";
    			reg = <0x0 0x100000>;
    			read-only;
    		};
    
    		partition@1 {
    			label = "misc";
    			reg = <0x100000 0xf00000>;
    		};
    	};
    };
    
    &mdio {
    	status = "ok";
    	ethphy0: ethernet-phy@0 {
    		compatible = "marvell,88E1111", "ethernet-phy-ieee802.3-c22";
    		reg = <0>;
    	};
    
    	ethphy1: ethernet-phy@1 {
    		compatible = "marvell,88E1111", "ethernet-phy-ieee802.3-c22";
    		reg = <1>;
    	};
    };
    
    &gbe_serdes {
    	status = "okay";
    };
    
    &dsp0 {
    	memory-region = <&dsp_common_cma_pool>;
    };
    
    &dsp1 {
    	memory-region = <&dsp_common_cma_pool>;
    };
    
    &dsp2 {
    	memory-region = <&dsp_common_cma_pool>;
    };
    
    &dsp3 {
    	memory-region = <&dsp_common_cma_pool>;
    };
    
    &dsp4 {
    	memory-region = <&dsp_common_cma_pool>;
    };
    
    &dsp5 {
    	memory-region = <&dsp_common_cma_pool>;
    };
    
    &dsp6 {
    	memory-region = <&dsp_common_cma_pool>;
    };
    
    &dsp7 {
    	memory-region = <&dsp_common_cma_pool>;
    };
    
    #include "k2hk-evm-cmem.dtsi"
    #include "keystone-uio.dtsi"
    #include "k2hk-uio.dtsi"
    

    After this error, I changed the DSPs memory to 1536MB and the code loaded and run successfully but be aware that my heap on DDR3 was 50MB and the previous errors did not relate to heap size.

    I did another test which was changing the Data memory in my platform to the DDR_dsp_shared section and it worked again, but when I changed the code memory to DDR_dsp_shared, it gave -108 error about no entry point like the below link.

    e2e.ti.com/.../1072976

    please give me your opinion about my works! I think my change in the device tree is not enough and I did not take the correct answer!

  • Hi,

    Sorry for the delay.
    Try using the 006000 0000 - 007FFF FFFF memory region, which 512M DDR3B data dedicated to DSP and see if the behavior of your system is the same.

    Best Regards,
    Yordan
  • Hi, I think DDR3B does not recognize by LINUX. Isn't it?
  • DSP should be able to use it.
  • Hi,

    Sorry disregard my previous reply. DSP can use DDR3B, but ARM (linux) cannot load the binary to that memory because it does not "see" it.

    Let me check further.

    Best Regards,
    Yordan
  • Hi, Mahat,

    In your original post, I didn't see you mentioning resource table. Do you have that in your DSP image? If not, you may want to look into it and please refer to resource table user's guide at processors.wiki.ti.com/.../IPC_Resource_customTable

    It does the DSP virtual to physical mapping and let Linux knows where areas are used by DSP.

    Rex
  • Hi Rex.
    If the resource table translates addresses for DSP, so what does MPAX do?
    Is there any example of using DDR3 in DSP code which mpmcl can load it?

    Is it necessary to change the device tree and mpm_config.json?!

  • Hi, Mahat,

    MPAX maps physical to virtual addresses (36 bits to 32 bits) to be used by DSP and only by DSPs. Resource table provides info on addresses used by DSP to Linux so MMU can be reprogrammed to allow access of these memory areas by DSP. If RTOS runs on ARM core, then resource table is not needed.

    All IPC examples can be loaded by mpmcl, but you can't build the DSP binaries using CCS unless you include the resource table. You can build the example using high level build. Please see instruction in IPC Quick Start Guide, software-dl.ti.com/.../Foundational_Components.html

    Rex
  • Dear Rex.

    Let me describe my problem very simple. For example, I want to load the same code to 8 DSPs and create for each of them a private memory. I want 1GB (in physical) for 8 DSPs. I want to map address 0xA0000000 to A8000000 (128MB in virtual) to 1GB (in Physical). How can I do that?

  • Mahat,

    I'll have the RTOS engineer to answer your question.

    Rex
  • Mahat,

    By the way, have you take a look at the example I showed you in the other thread how each core cofigures the memory? That example runs on all 8 cores. Please take a look and understand how it works.

    Rex
  • Rex.
    I read that example and run it. it does not need any area in DDR3 but I need! You know this is my problem! Getting a heap in DDR3 to allocating memory with this example!

  • Hello,

    Please take a look at the following documents for customizing memory map:

    http://www.ti.com/lit/an/sprac60/sprac60.pdf

    If you have any questions please let us know.

  • Hi Rex. Do you mean that MPAX use in case there is no LINUX and only RTOS between DSPs? And in the case that LINUX is running, we must use resource table?

  • Hi, Mahat,

    Yours is a simple question, but it's more complicate. Let's just focus on AM57x platform, not other TI devices. Also, I am not a DSP person so we only focus on ARM-Linux/DSP-RTOS scenario, not RTOS/RTOS. I'll try to do my best to explain on DSP RTOS side

    MPAX are DSP registers to map physical to 32-bit virtual so DSP can access 36-bit memory space. Linux is not in the picture. It's purely DSP, and is needed to be programmed by DSP.

    All DSP _IPC_ applications need to have resource table to notify Linux what memory areas DSP will be using, so MMU can be reprogrammed to grant DSP access to these memory areas.

    Hope this is clear.

    Rex
  • Hi Rex.

    Let me explain to you exactly what I'm doing. I have Linux on ARMs cores and RTOS on DSPs. I want to load the same code to DSPs and they need to get memory as private in the DDR3. There is a connection between Linux and DSPs with IPC. So

    1- How can I translate my virtual addresses in the DSP code (32 bit) to the physical (36 bit)?

    2-How can I alert to Linux that DSPs are using this physical addresses?

    3-How  can I change the Linux to let DSP use this addresses? 

    Actually, I became a little bit confused about this, please help me. I don't know what is the relationship between the resource table and mpm-config.json (in linux) and device tree and  MPAX register and their usage?

    Is there anyyyyy application note that explains these items?

  • Mahat,

    Most of your questions can be found in the documentation and I suggest you go through them to understand DSP programming. I won't be able to go through all details in the e2e forum, but I can answer part of the question s briefly here.

    1. The DSP engineer can point you to either the right documentation or example.
    2. This is through resource table. In resource table, you map DSP virtual address to Physical address. Linux kernel takes the info and configures accordingly.
    3. There are CMA and CMEM areas for DSP. CMA mainly for remoteproc to use. The DSP can map its memory to either one, TYPE_CARVEOUT to CMA or TYPE_DEVMEM to CMEM. If mapped to CMA, CMA needs to be big enough to hold what consumed by remoteproc and your application. CMA and CMEM is defined in am57xx-evm-cmem.dtsi.

    Rex