My device is TMS320C6670.
IPC:3.40.1.08
MCSDK: 2.1.2.6
PDK: 1.1.2.6
NDK: 2.25.1.11
SYS/BIOS: 6.46.5.55
XDCtools: 3.32.2.25_core
I am trying to run the same project in two cores while one core runs NDK part and another core runs FFTC part. But I have a hard time making two cores run the corresponding part separately.
I use the following function in my project to distinguish the coreNum.
coreNum = CSL_chipReadReg (CSL_CHIP_DNUM);
core0 runs the following part :
if(coreNum==0){
/* Get information about the platform so we can use it in various places */
memset( (void *) &gPlatformInfo, 0, sizeof(platform_info));
(void) platform_get_info(&gPlatformInfo);
(void) platform_uart_init();
(void) platform_uart_set_baudrate(115200);
(void) platform_write_configure(PLATFORM_WRITE_ALL);
/* Clear the state of the User LEDs to OFF */
for (i=0; i < gPlatformInfo.led[PLATFORM_USER_LED_CLASS].count; i++) {
(void) platform_led(i, PLATFORM_LED_OFF, PLATFORM_USER_LED_CLASS);
}
if (system_init (coreNum, fftcInstNum) != 0)
{
System_printf ("[Core %d]: FFTC Example system init failed \n", coreNum);
return;
}
/* Setup cppi descriptors and PA . */
cppi_cfg.dma_num = Cppi_CpDma_PASS_CPDMA;
cppi_cfg.num_tx_queues = NUM_PA_TX_QUEUES;
cppi_cfg.num_rx_channels = NUM_PA_RX_CHANNELS;
if (res_mgr_init_cppi (&cppi_cfg) != 0)
{
platform_write ("Failed to initialize CPPI subsystem \n");
}
else
{
platform_write ("CPPI successfully initialized \n");
}
if (res_mgr_init_pass(&qmss_cfg)!= 0) {
platform_write ("Failed to initialize the Packet Accelerator \n");
}
else
{
platform_write ("PA successfully initialized \n");
}
bIsSysInitDone = 1;
/* Writeback L1D */
CACHE_wbL1d ((void *) &bIsSysInitDone, 4, CACHE_WAIT);
}
core1 runs the following part :
else{
System_printf ("[Core %d]: Waiting for Sys Init to be completed ... \n", coreNum);
do{
CACHE_invL1d ((void *) &bIsSysInitDone, 4, CACHE_WAIT);
} while (bIsSysInitDone == 0);
/* Start Queue manager on this core */
Qmss_start ();
}
The problem is that only core0 gets to run it's own part and core1 seems to get stuck in somewhere. I tried to change the highlighted part(with red color) to coreNum==1, and core0 results in running the else part and core1 still ended up getting stuck.
Please help me with this and I'd like to express my sincere gratitude in advance.
And my .cfg file is attached.
/* ======== fftc_test.cfg ========
*/
/* Load all required BIOS/XDC runtime packages */
var Memory = xdc.useModule('xdc.runtime.Memory');
var BIOS = xdc.useModule('ti.sysbios.BIOS');
var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');
var HeapBuf = xdc.useModule('ti.sysbios.heaps.HeapBuf');
var Log = xdc.useModule('xdc.runtime.Log');
var Task = xdc.useModule('ti.sysbios.knl.Task');
var Semaphore = xdc.useModule('ti.sysbios.knl.Semaphore');
var Hwi = xdc.useModule ('ti.sysbios.hal.Hwi');
//var Hwi = xdc.useModule('ti.sysbios.family.c64p.Hwi'); // rx Hwi
var Ecm = xdc.useModule('ti.sysbios.family.c64p.EventCombiner');
var Timer = xdc.useModule('ti.sysbios.hal.Timer');
//xdc.useModule('ti.sysbios.hal.Timer'); // rx Timer
/* Load the CSL package */
var Csl = xdc.useModule('ti.csl.Settings');
/* Load the CPPI package */
var Cppi = xdc.loadPackage('ti.drv.cppi');
/* Load the QMSS package */
var Qmss = xdc.loadPackage('ti.drv.qmss');
/* Load the FFTC package */
var Fftc = xdc.loadPackage('ti.drv.fftc');
var System = xdc.useModule('xdc.runtime.System');
SysStd = xdc.useModule('xdc.runtime.SysStd');
System.SupportProxy = SysStd;
var Cache = xdc.useModule('ti.sysbios.family.c66.Cache');
//xdc.useModule('ti.sysbios.hal.Cache'); // rx cache
var Startup = xdc.useModule('xdc.runtime.Startup');
//Startup = xdc.useModule('xdc.runtime.Startup'); // rx startup
//Startup.firstFxns.$add('&myStartupFxn'); // rx startup firstFxns
Startup.firstFxns.$add('&myStartupFxn');
Startup.lastFxns.$add('&EVM_init');
/* Create a default system heap using ti.bios.HeapMem. */
var heapMemParams1 = new HeapMem.Params; // ndk heap
heapMemParams1.size = 8192 * 30; // 204800
heapMemParams1.sectionName = "systemHeap";
Program.global.heap0 = HeapMem.create(heapMemParams1);
Program.sectMap["systemHeap"] = "L2SRAM";
/*Program.sectMap[".text"] = "DDR3"; // ndk
Program.sectMap[".far:NDK_PACKETMEM"] = {loadSegment: "MSMCSRAM", loadAlign: 128}; // ndk
Program.sectMap[".nimu_eth_ll2"] = "L2SRAM"; // ndk
Program.sectMap[".resmgr_memregion"] = {loadSegment: "L2SRAM", loadAlign:16}; // QMSS descriptors region // ndk
Program.sectMap[".resmgr_handles"] = {loadSegment: "L2SRAM", loadAlign:16}; // CPPI/QMSS/PA Handles // ndk
Program.sectMap[".resmgr_pa"] = {loadSegment: "L2SRAM", loadAlign:8}; // PA Memory // ndk
Program.sectMap[".far:IMAGEDATA"] = {loadSegment: "L2SRAM", loadAlign: 8}; // ndk
Program.sectMap[".far:NDK_OBJMEM"] = {loadSegment: "L2SRAM", loadAlign: 8}; // ndk
Program.sectMap[".symb"] = "L2SRAM";
Program.sectMap["platform_lib"] = "MSMCSRAM"; // ndk8 */
/* This is the default memory heap. */
Memory.defaultHeapInstance = Program.global.heap0;
Program.sectMap[".fardata"] = "DDR3"; // ndk
Program.sectMap[".cinit"] = "DDR3"; // ndk
Program.sectMap[".text"] = "MSMCSRAM"; // ndk
Program.sectMap[".symb"] = "DDR3";
/*Program.sectMap[".symb"] = "DDR3";
Program.sectMap[".testData"] = "DDR3";
Program.sectMap["systemHeap"] = "DDR3";
Program.sectMap["sharedL2"] = "DDR3"; // ndk
Program.sectMap[".sysmem"] = "DDR3"; // ndk
Program.sectMap[".args"] = "DDR3"; // ndk
Program.sectMap[".cio"] = "DDR3"; // ndk
Program.sectMap[".rodata"] = "L2SRAM"; // ndk
Program.sectMap[".neardata"]= "L2SRAM"; // ndk
Program.sectMap[".bss"] = "L2SRAM"; // ndk
Program.sectMap[".cinit"] = "L2SRAM"; // ndk
Program.sectMap[".const"] = "L2SRAM"; // ndk
Program.sectMap[".code"] = "L2SRAM"; // ndk
Program.sectMap[".switch"] = "L2SRAM"; // ndk
Program.sectMap[".data"] = "DDR3"; // ndk
Program.sectMap[".vecs"] = "L2SRAM"; // ndk
Program.sectMap["platform_lib"] = "L2SRAM"; // ndk
Program.sectMap[".DbgSection"] = "DDR3"; // ndk
Program.sectMap[".far:NDK_PACKETMEM"] = {loadSegment: "MSMCSRAM", loadAlign: 128}; // ndk
Program.sectMap[".nimu_eth_ll2"] = "L2SRAM"; // ndk
Program.sectMap[".resmgr_memregion"] = {loadSegment: "L2SRAM", loadAlign:16}; // QMSS descriptors region // ndk
Program.sectMap[".resmgr_handles"] = {loadSegment: "L2SRAM", loadAlign:16}; // CPPI/QMSS/PA Handles // ndk
Program.sectMap[".resmgr_pa"] = {loadSegment: "L2SRAM", loadAlign:8}; // PA Memory // ndk
Program.sectMap[".far:IMAGEDATA"] = {loadSegment: "L2SRAM", loadAlign: 8}; // ndk
Program.sectMap[".far:NDK_OBJMEM"] = {loadSegment: "L2SRAM", loadAlign: 8}; // ndk
Program.sectMap[".mul_shared_mem"] = "MSMCSRAM";*/
/****** IPC - Shared Memory Settings ********/
/* IPC packages */
var Ipc = xdc.useModule('ti.sdo.ipc.Ipc');
var Settings = xdc.module('ti.sdo.ipc.family.Settings');
var ListMP = xdc.useModule('ti.sdo.ipc.ListMP');
var GateMP = xdc.useModule('ti.sdo.ipc.GateMP');
var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion');
var HeapMemMP = xdc.useModule('ti.sdo.ipc.heaps.HeapMemMP');
var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc');
var memmap = Program.cpu.memoryMap;
/* Configure the shared memory heap for shared memory allocations required by the
* CPPI and QMSS Libraries */
SharedRegion.translate = false;
/* Create a shared memory heap */
MultiProc.setConfig(null, ["CORE0", "CORE1"]);
/* Synchronize all processors (this will be done in Ipc_start) */
Ipc.procSync = Ipc.ProcSync_ALL;
/* To avoid wasting shared memory for Notify and MessageQ transports */
for (var i = 0; i < MultiProc.numProcessors; i++) {
Ipc.setEntryMeta({
remoteProcId: i,
setupNotify: false,
setupMessageQ: false,
});
}
/* Create a shared memory */
SharedRegion.setEntryMeta(0,
{ base: 0x0C010000,
len: 0x00100000,
ownerProcId: 0,
isValid: true,
name: "sharemem",
});
/* Enable BIOS Task Scheduler */
BIOS.taskEnabled = true;
/*
* Enable Event Groups here and registering of ISR for specific GEM INTC is done
* using EventCombiner_dispatchPlug() and Hwi_eventMap() APIs
*/
Ecm.eventGroupHwiNum[0] = 7;
Ecm.eventGroupHwiNum[1] = 8;
Ecm.eventGroupHwiNum[2] = 9;
Ecm.eventGroupHwiNum[3] = 10;
/* ================ TCP3d Coprocessor .cfg region ================ */
/* Create a heap for TCP3D driver using ti.bios.HeapMem. */
Program.sectMap["tcp3DriverSection"] = Program.platform.dataMemory;
var heapMemParams2 = new HeapMem.Params;
heapMemParams2.size = 0x4000;
heapMemParams2.sectionName = "tcp3DriverSection";
Program.global.tcp3dDrvHeap = HeapMem.create(heapMemParams2);
/* Create a heap for TCP3D QUEUE DESCRIPTORS using ti.bios.HeapMem. */
Program.sectMap["tcp3QueueDescrSection"] = Program.platform.dataMemory;
var heapMemParams3 = new HeapMem.Params;
heapMemParams3.size = 4096;
heapMemParams3.sectionName = "tcp3QueueDescrSection";
Program.global.tcp3dQueHeap = HeapMem.create(heapMemParams3);
/*xdc.loadPackage('ti.wbi.common.api');*/
xdc.loadPackage('ti.sdo.edma3.drv');
xdc.loadPackage('ti.drv.tcp3d');
xdc.useModule('ti.sysbios.knl.Swi');
xdc.useModule('ti.sysbios.family.c66.tci66xx.CpIntc');
xdc.useModule('xdc.runtime.Error');
var LoggerSys = xdc.useModule('xdc.runtime.LoggerSys');
/* ================ NDK .cfg region ================ */
Task.common$.namedInstance = true; // NDK cfg code, �ʼ�
var Clock = xdc.useModule ('ti.sysbios.knl.Clock');
var Diags = xdc.useModule('xdc.runtime.Diags');
/* Load the PA package */
var Pa = xdc.useModule('ti.drv.pa.Settings');
/* Load the Platform/NDK Transport packages */
var PlatformLib = xdc.loadPackage('ti.platform.evmc6670l');
var NdkTransport = xdc.loadPackage('ti.transport.ndk');
var Exc = xdc.useModule('ti.sysbios.family.c64p.Exception');
Exc.enablePrint = true; /* prints exception details to the CCS console */
var Global = xdc.useModule('ti.ndk.config.Global');
Global.enableCodeGeneration = false;
Global.pktNumFrameBufs = 3;
Global.pbmDataSection = ".far:NDK_PACKETMEM";
Global.pktSizeFrameBuf = 500000;
Semaphore.supportsEvents = false;
// Decoder heap
/*var heapMem3Params = new HeapMem.Params();
heapMem3Params.instance.name = "decoderheap";
heapMem3Params.size = 204800;
heapMem3Params.sectionName = "decoder";
Program.global.decoderheap = HeapMem.create(heapMem3Params);*/
