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66AK2G12: Clarification about Errata : KeyStoneII.BTS_errata_advisory.46

Part Number: 66AK2G12

Hi,

Errata states the following issue and its workaround.

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KeyStoneII.BTS_errata_advisory.46 BOOT, GMPC: GPMC XIP Boot Failure

Revision(s) Affected: 1.0


Details: General-Purpose Memory Controller (GPMC) eXecute in Place (XIP) boot fails with
default timing value.


Workaround(s): The default timing value is too aggressive for the currently available flash devices. To
work around this issue, the boot pins should select a PLL reference clock frequency that
is higher than the actual reference clock frequency. For example, if the actual reference
clock frequency is 24 MHz, then the boot pins need to select a 100 MHz reference clock
frequency. The XIP boot then will succeed and the PLLs can be reconfigured along with
the XP timing to continue the booting process.

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So how to select BOOTMODE pin ? TRM states "REF CLK" bitfield can be configured as 19.2 ,24, 25 and 26Mhz in 4.3.2.7 XIP Boot Device Configuration and Table 4-16. Reference Clock Values, but there is no higher speed configurations documented, say 100Mhz like this workaround. Can you clarify ?

Best Regards,
NK