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TCI6630K2L: DFE + TI Analog Front End (AFE58JD28) - request high-level advice (next iteration)

Part Number: TCI6630K2L

We are trying to connect a K2L with the JESD bus to an Analog Front End eval board (AFE58JD28).  Here is the data path we are trying to get working:
 
data from a signal generator-> AFE -> Keystone DFE -> DFE Rx Bypass -> .... Keystone Arm Linux program
 
For the time being, we are planning to use just one of the ADC's on the AFE 58JD28, and just one JESD lane. 

We would like to stream the ADC data around the DFE in "DFE RX Bypass" mode.


We have an AFE eval board, and have mated up the AFE eval board to the Keystone K2L eval board over the JESD bus. We also have the Keystone controlling the AFE eval board over SPI.
 
Now, I am trying to configure the DFE and JESD bus to demonstrate streaming data. My biggest challenge is that I cannot easily find documentation support to set the DFE up into DFE RX Bypass mode. I would appreciate any help, suggestions, guidance or links to the appropriate documentation on this.

We are using dfeTest1 on the Keystone Arm Linux processor successfully as a starting point.


My goal is to modify dfeTest1 so that it puts the DFE/JESD into RX bypass mode, so that we can receive ADC data from the AFE board.  Does this seem like a reasonable approach?


We have the RFSDK package from TI, but that looks like a significant amount of effort to get all set up in the TI Keystone eval board.  Do we need to do that?  Would you recommend that we spend the time to get that all set up and running on the Keystone eval board?


Is there some example code that receives data in from the JESD bus (as opposed to using internal loopback) and configures Rx Bypass mode?


Is there DFE register-level documentation for how to set up Rx Bypass mode?  The only DFE documentation I have been able to find is the few pages in the main K2L data sheet, the Keystone II DFE User's Guide, and the doxygen comments in the dfe source code.


Thanks,


Greg Johnson
  • Hello Greg,

    There is a TI design that uses the 14X250 ADC, with 66aK2L06 that uses a 245.76Msps real ADC, with an 122.88Msps single complex bypass.

    This is the only TI design that has the functional bypass (other than the Real to Complex Hilbert Transform).  www.ti.com/.../tidub89.pdf

    Please look at this E2E " e2e.ti.com/.../2466712 "

     This is the only Rx bypass example, that is published.  Other configurations, you would have to consult with the 3rd party partners: Azcom LTD, and Comm Agility Ltd.

    The AFE58JD28  is listed as a 16 channel ultrasound device. 

    In the concept of Rx bypass, you would have a real centered at Fs/4 R2C convertered to 0IF, or a complex input at 0 iF.

    num Rx streams, real/complex, sample rate, Rx stream complex rate - Rx Baseband complex rate, notes

    1, real, 245.76Msps, 122.88Msps, 122.88Msps, TI Design 2 see tidub89.pdf (*)

    1, complex, 122.88Msps, 122.88Msps, 122.88Msps, no TI design

    2, real, 184.32Msps, 92.16Msps, (2 car) 92.16Msps, no TI design - 2 stream; 1 Baseband carrier per stream

    2, complex, 92.16Msps, 92.16Msps, (2 car) 92.16Msps, no TI design - 2 stream; 1 Baseband carrier per stream

    4, real, 92.16Msps, 46.08Msps, (4 car) 46.08Msps, no TI design - 4 stream; 1 Baseband carrier per stream

    4, complex, 46.08Msps, 46.08Msps, (4 car) 46.08Msps, no TI design - 4 stream; 1 Baseband carrier per stream

    8, (special), special 8 real formatted as 4 complex 46.08, (4 car) 46.08, no TI design - 4 stream ; 2 real Baseband carriers in each complex output per stream 

    (*) only 1 configuration has a TI design.

    One of the key elements is that the number of Rx streams can be 1, 2, or 4; and if we have a complex input, that the Rx IQ rate extracted from the JESD link has to be the same as the Rx Baseband IQ output rate.  There can be a special case, of 8 real samples packed like 4 IQ streams, this has not been worked out.

      Regards,

    Joe Quintal

  • Thanks very much Joe, I appreciate it and will check out your suggestions.

    Greg Johnson