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CCS/66AK2H14: how to flash the application into multiple cores.

Part Number: 66AK2H14

Tool/software: Code Composer Studio

Hi,

I am using CCS7.4 and ti-processor-sdk-rtos-k2hk-evm-04.03.00.05-Windows-x86-Install.

1. I have to flash one application into DSP core 0 and another application into DSP core 1.

I followed below steps:

  • out2rprc.exe  app1.out  app1_rprc
  • out2rprc.exe  app2.out  app2_rprc
  • MulticoreImagGen.exe  LE 55  app 5 app1_rprc  6  app2_rprc
  • Flashed app using flashwriter .

But when I changed the boot mode to SPI , It got stuck at

Jumping to user application....

2. I want to flash the application to DSP core 1 instead of DSP core 0.

  • out2rprc.exe  app.out  app_rprc
  • MulticoreImagGen.exe  LE 55  app  6  app_rprc
  • Flashed app using flashwriter .

Here also when I changed the boot mode to SPI it got stuck at 

Jumping to user application....

Please help me to solve this.

Thanks and Regards,

Mahima Shanbag

  • Hi,

    We're looking into this.

    Best Regards,
    Yordan
  • Mahima,

    There are steps that we have highlighted here to debug booting using SBL:
    processors.wiki.ti.com/.../Processor_SDK_RTOS_Boot

    You can skip over the hardware steps and take a look at the common recommendations. As far as core ID and the process of creating the image, they seem to be correct.

    You can also connect to the ARM core0 without GEL files in CCS and see where the core PC is at and then load the symbols from sbl.out and correlate this with SBL code. Another common error that we have observed is the app should not be loading sections into location from where SBL runs. make sure that you don`t have code section in app at the following location:
    SBL_MEM (RWX) : o = 0x0C0B0000, l = 0x3FC00 /* MSMC Shared Memeory */


    Can you please also indicate what is the PC when you connect to the the DSP(without GEL) is this in region indicated in your application map file ? Wha t is expected on the UART after the application starts? as in do you have UART prints that should show when the application is executing ?

    Regards,
    Rahul
  • Hi Rahul,

    Thank you for your quick reply.

    Another common error that we have observed is the app should not be loading sections into location from where SBL runs. make sure that you don`t have code section in app at the following location:

    SBL_MEM (RWX) : o = 0x0C0B0000, l = 0x3FC00 /* MSMC Shared Memeory */

    ------------------------------------------>>>>>>>>>

    I checked in memory map of my application , It is not using that region of MSMC .

    Can you please also indicate what is the PC when you connect to the the DSP(without GEL) is this in region indicated in your application map file ?

    PC is at 0x20B11720 , this region is not indicated in map file of my application.

    What is expected on the UART after the application starts?

    application output prints.

    do you have UART prints that should show when the application is executing ?

    yes.

    If  I flash the application into core 0 ,  application runs and gives all the prints on the terminal  when I change the boot mode.

    problem is only with other cores. when I flash the application to other DSP cores it will get stuck at

    Jumping to user application....

    What may be the problem with other cores?Please help me to solve this.

    Thanks and Regards,

    Mahima Shanbag

  • Hi,
    Any updates ?

    Regards,
    Mahima Shanbag
  • Mahima,

    This would require, you to load the SBL.out on the A15_0 and see where in the boot process the loading fails when loading code on core1. One potential issue could be that you are not using global addressing when placing and accessing code/data from DSP L2 memory or if there is some overlap between DSP0 core app and DSP core1 app addresses. 

    To debug, you should connect to A15 core0 in CCS without GEL file and load SBL.out and let the SBL setup clocks and DDR and then copy the images from SPI. at the end of load processes the SBL determines the entry point for each cores. Can you check in what process it fails. Since the DSP is in 0x20XX_XXXX, it indicates that the SBL has not woken up that core and the core is still executing in ROM bootloader

    Regards,

    Rahul 

  • Hi Rahul,

    Thank you for your support.

    1. I debug SBL.out for core 1 , it was failing at

    if (entry.entryPoint_DSP1 != 0)

       {

           SBL_DSPBringUp(1, entry.entryPoint_DSP1);

       }

    this point. Entry.entryPoint_DSP1 = 0x81FAE0. When it reaches this point it gives some error. I have attached the screen shot for your reference.

    but this problem was not there when I flash the code to DSP core 2. In DSP core 2 it will bring up DSP core 2 as per

       SBL_DSPBringUp(2, entry.entryPoint_DSP2);

    I didnt get any error here , but still when I change the boot mode to SPI it will get stuck at

    Jumping to user application....

    2. There is no overlap of address between DSP core0 app and DSP core1 app

    3. When I flash two application on core 0 and core 1, entry point will be

    entry.entryPoint_DSP0 = 0x81FAE0

    entry.entryPoint_DSP1 = 0x840420

    I didn't find any error accept for core 1 when I debug SBL.out . I am not able to track down the issue.

    Please help me with this.

    Thanks and Regards,

    Mahima Shanbag

  • Mahima,

    This is a ARM boot device where the SBL is running on the A15 core and loading the code. The two entry points that you are indicating seem to be using DSP internal addressing which the ARM doesn`t recognize

    You need to use global addresses for the A15 to load the code and provide the entry point.

    A quick and dirty way to validate this would be to use MSMC memory instead of L2 and check if the boot works successfully. This is shared memory that is visible to all cores so there should be no issues. If that succeeds then this is likely caused due to the addressing.

    Regards,

    Rahul 

  • Hi Rahul,
    1.
    This is a ARM boot device where the SBL is running on the A15 core and loading the code. The two entry points that you are indicating seem to be using DSP internal addressing which the ARM doesn`t recognize.
    ------------------------------------------------------------------->>>
    I got one doubt, if ARM doesn't recognize the entry point then how DSP core0 boots up successfully?

    2.You need to use global addresses for the A15 to load the code and provide the entry point.
    ------------------->>>
    I didn't get to know where to do these changes . Because entry point is taken from RPRC header .

    Regards,
    Mahima Shanbag
  • Hi Rahul,

    I mapped the application  to MSMC and tried but still it is getting stuck at same point.

    I debug the sbl .out ,

    entry.entryPoint_DSP2 = 0xC00EAC0.

    I attached my .map file for your reference.

    temperature_sensor.txt

    Regards,

    Mahima Shanbag

  • Hi,
    Any updates on the issue.

    Regards,
    Mahima Shanbag
  • Hi Rahul,

    one more thing that I observed is , When I connect to core 2 through JTAG in spi boot mode it is giving some error.

    I have attached the screen shot of the error for your reference.

    and PC was at 0xAC9A5EF4.

    This error was not there when I tried to connect to core 0.

    Regards,

    Mahima Shanbag

  • Hi Rahul,

    When I try to debug the application flashed to core 2 by loading the symbols , it is giving error.

    I have attached the screen shot for your reference.

    Regards,

    Mahima Shanbag

  • Hi Rahul,
    waiting for your reply.

    Regards,
    Mahima Shanbag
  • Hi,
    Please help me to solve this issue as soon as possible.
    I am stuck in this from past 3 weeks .

    Regards,
    Mahima Shanbag
  • Mahima,

    I am currently tied up with high priority activities so I have not been able to spend cycles on this issue. I have looped in a colleague of mine to help with the issue and you should here from him soon.

    Regards,
    Rahul
  • Hi Mahima,

    Just to confirm the settings,

    Are you able to run post example provided by TI on your setup?

    I hope you are following below link, Please confirm.

    Thank you.

  • Hi Raja,
    Thanks for your reply.
    I am able to run the post example on my board and I followed the link that you have mentioned.
    I am able to boot from DSP core 0 , all other DSP core has the same issue.

    Regards,
    Mahima Shanbag
  • 1. I hope you are running post application on DSP core 0. Please confirm.

    2. What are you trying to run on other cores? What those application does?

    3. How are you flashing the SBL and custom applications on board? Offset of application in SPI?

    Thank you.
  • Hi Raja,

    1. Yeah I run post application on DSP Core 0.

    2.I was trying to run hyperlink example on DSP core 1.

    3. I used flash writer application to flash the MLO and application.
    I referred this wiki processors.wiki.ti.com/.../L.
    Offset is 80000.

    Thanks and Regards,
    Mahima Shanbag
  • Hi Raja,
    I tested the same on EVM by flashing the post application on DSP core 1 using flash_writer application.
    To create the app for core 1:
    out2rprc\bin\out2rprc.exe C:\ti\pdk_k2hk_4_0_9\packages\ti\boot\post\evmk2h\bin\post_evmk2h.out C:\images\app_rprc

    multicoreImageGen\bin\MulticoreImageGen.exe LE 55 C:\images\app 6 C:\images\app_rprc

    When I changed the boot mode to SPI , It got stuck in
    jumping to user application......

    Please help me with this

    Thanks and Regards,
    Mahima Shanbag
  • I tested the same on EVM by flashing the post application on DSP core 1 using flash_writer application.
    To create the app for core 1:
    out2rprc\bin\out2rprc.exe C:\ti\pdk_k2hk_4_0_9\packages\ti\boot\post\evmk2h\bin\post_evmk2h.out C:\images\app_rprc

    multicoreImageGen\bin\MulticoreImageGen.exe LE 55 C:\images\app 6 C:\images\app_rprc

    When I changed the boot mode to SPI , It got stuck in
    jumping to user application......


    In this case, you are loading only core 1 not core 0. Am i right?

    I am working on to re-produce the issue to solve. Thank you for your patience.
  • Hi ,
    Yeah I just loaded only core1 .

    Thanks and Regards,
    Mahima Shanbag
  • Hi Raja,
    Waiting for your reply....

    Regards,
    Mahima shanbag
  • Hi Mahima,

    Apologize for the delay. I am working on it, will post my response as soon as possible. Thank you.
  • Mahima,
    I am able to re-produce the issue in K2H EVM and debugging by loading the symbols of SBL. I will keep you posted on the progress.

    Thank you for your patience.
  • Hi Raja,
    Any updates?

    Regards,
    Mahima Shanbag
  • Hi Mahima,

    I have raised bug report(PRSDK-4758) to Processor SDK 5.0 with my observation and procedure. It should get fixed in upcoming processor SDK releases however i don't have the planned release/date.

    Thank you.