Hello,
in IPC, what exactly does 32 SW interrupt multiplexed on HW interrupt mean.? Also are these 32 SW interrupts common for the entire SoC or is it on a per core per interrupt basis. If the later is true, how many such IPC interrupts do we have in TMS320C6678? Are these interrupts shared with external interrupts or are they specific only for IPC within SoC..? Please advice. Thank you for the answering in advance.
Ty.