C6000 Multicore DSP

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C6000 Multicore DSP

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6678 ccs4.2.3
Related Posts

  • Forum Post: Why only 4 cores showed for 6678 in CCS4.2.3

    Lucifar He
    Hi, environment: external SEED XDS560PLUS emulator (USB) CCS4.2.3 In the target configuration, there is only a 66xx item I can choose. After launch the configuration, only four cores shows in the window. Does anybody knows why? PS the four cores go well. I just cannot find the other...
    on Aug 25, 2011

  • Forum Post: About build error in c66x_h264vdec_02_04_00_03_ELF.exe.

    may may92122
    When I built the TestAppDecoder project coming with c66x_h264vdec_02_04_00_03_ELF.exe,sometimes an error occurred: js:"C:/Program Files/Texas Instruments/Codecs/C66x_264vdec_02_04_00_03-ELF/packages/ti/sdo/codecs/h264vdec/App/Client/Build?TestAppDecoder/H264VDecApp6678.cfg". line 72:xdc.services...
    on Jun 21, 2012

  • Forum Post: Hex file format

    Anshul Maheshwari
    hi guys, i just wanted to know that hex file that we load in core of our processor. Is it intel hex file format or ti has some own hex file format If ti has its own hex file format can any one refer to the documentation of it. Thanks Anshul ;)
    on Jun 25, 2012

  • Forum Post: How to use c66x_h264vdec_02_04_00_03_ELF.exe to decode h264 bit stream from visual telephone?

    may may92122
    Based on the TestAppDecoder project coming with c66x_h264vdec_02_04_00_03_ELF.exe, I intended to decode h264 bit stream from visual telephone. The image format for the visual telephone is SQCIF, and the first h264 bitstream is:67 42 c0 0a f4 16 27 42 00 00 03 00 02 00 00 03 00 3d 1e 24 4d 40,where...
    on Jun 20, 2012

  • Forum Post: RE: tms320c6678

    Avinash Neethi1
    Hi Chad, I got a clear idea now. what are the register that should be configured for proper operation. I have listed the registers can you let me know what registers should be configured and why? I have a in source file in that certain register are configured and certain registers are assumed as 0. Can...
    on Aug 6, 2012

  • Forum Post: RE: Performance DSPC-8681

    studinstru sggs
    Hi Vivek, Am working on the DSPC -8681 Advantech hardware. As this hardware having PCIe slot so I inserted that hardware in my pc with PCIe x8 slot. AM able to run some example code on this board like pc to board communication via PCIe. Finally I decided to write a small example code "Hello...
    on Oct 18, 2012

  • Forum Post: RE: Ti_H.264_High Profile encoder for C6678 ????

    studinstru sggs
    Hi Vivek, Am working on the DSPC -8681 Advantech hardware. As this hardware having PCIe slot so I inserted that hardware in my pc with PCIe x8 slot. AM able to run some example code on this board like pc to board communication via PCIe. Finally I decided to write a small example code "Hello...
    on Oct 18, 2012

  • Forum Post: Communication between different cores in evm6678

    Zhao Shui
    Hi,everyone This is my first time to use multcore dsp and I have some questions about the method to transfer data between different cores. To do some experiment on the board, I create 8 projects for 8 core first. And I create 8 different rtsc platform(I divide the MSMCSRAM as MSMCSRAM0~MSMCSRAM7...
    on Nov 13, 2012

  • Forum Post: when to load different code in different core?

    Zhao Shui
    Hi, everyone I'm wondering if I need a lot communication between cores which way is recommended: 1.Load same code in all cores and decide what to do in different cores by core num,which is used in CCS's example program of messageQ(single image for all cores) 2.Or load different code in...
    on Nov 14, 2012

  • Forum Post: Possible to put data both in L2D and MSMC(C6678)?

    Zhao Shui
    Hi,everyone I'm wondering is it possible by changing rtsc platform file to put my data partly in L2D and partly in MSMC? Or if I choose to put my data in MSMC in platform file,I have to put all my data in MSMC?if this is true,what should I do with the L2D，I believe there is some way to utilize...
    on Dec 2, 2012

  • Forum Post: Keystone Core interface set up.

    Hector Rivera
    All, I have a customer that is asking if they can configure a keystone device that one of the cores has ownership of a specific interface for sample the PCIe. Below is the customer question as they sent it to me. Is there a way to have a particular CPU core who “owns” a given PCIe or...
    on Dec 3, 2012

  • Forum Post: loading ld file and .out both simultaneously using common host dimtest and ccs

    Javed Iqbal
    Hi All, I am using TMS320C6678 and CCSv 5.1. I need to load an ld file in ethernet boot mode using X86 host ( using dimtest micro to dsp ) and simultaneously I need to load .out file (of same application as ld file) from CCS . And my question is that It is possible to load an Image from both ? If yes...
    on Dec 13, 2012

  • Forum Post: TMS320C6678 REV-2.0

    Avinash Neethi1
    Hi , We were currently working on the second board. In the second board we use one rev-1.0 and one rev-2.0(TMS320c6678 REV-1.0,REV-2.0). I am porting the first board GEL file for the second board. In our first board both the DSP are REV-1.0, But in our second board one is REV-1.0 and one is REV-2...
    on Jan 25, 2013

  • Forum Post: Release of : H264HP Encoder ?????

    studinstru sggs
    Hi, With reference to the my previous post, Can anybody tell When Ti H264 High profile Encoder is going to release in market ????? Please let me know. -Studinstru
    on Jan 24, 2013

  • Forum Post: Error during running H264 HP Encoder in release mode !!!! .....

    studinstru sggs
    Hi , I am using the C6678 evm for running the H264 HP Encoder. CCS v5.3 on linux ubuntu 12.04 lts. I tried to run the H264 HP encoder in debug mode I got the output. But when I tried to run in release mode I am getting different type of errors - INTERNAL ERROR: /opt/ti/ccsv5/tools/compiler...
    on Jan 29, 2013

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