C6000 Multicore DSP

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C6000 Multicore DSP

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320C667x
Related Posts

  • Forum Post: BIOS MCSDK 2.0 support 320C647x?

    Robert W
    Hi, I find that BIOS MCSDK 2.0 talks a lot on 320C667x, but never mentions 320C647x. There is no connection between BIOS MCSDK 2.0 and 320C647x? Thanks
    on Jun 21, 2012

  • Forum Post: DDR3 MEMORY ISSUE

    Avinash Neethi1
    HI, When i am executing the GEL file in the TMS320C6678. The bellow ERROR is show can any one tell why this error is shown. This Error is shown bellow C66xx_8: GEL Output: Main PLL (PLL1) Setup ... C66xx_8: GEL Output: Error while waiting for GOSTAT bit returning to 0 ...
    on Jan 23, 2013

  • Forum Post: TMS320C6678 REV-2.0

    Avinash Neethi1
    Hi , We were currently working on the second board. In the second board we use one rev-1.0 and one rev-2.0(TMS320c6678 REV-1.0,REV-2.0). I am porting the first board GEL file for the second board. In our first board both the DSP are REV-1.0, But in our second board one is REV-1.0 and one is REV-2...
    on Jan 25, 2013

  • Forum Post: RE: Memory Problem In C6678

    Avinash Neethi1
    Hi Randy, We were currently working on the second board. In the second board we use one rev-1.0 and one rev-2.0(TMS320c6678 REV-1.0,REV-2.0). I am porting the first board GEL file for the second board. In our first board both the DSP are REV-1.0, But in our second board one is REV-1.0 and one is...
    on Jan 25, 2013

  • Forum Post: PCIe drivers support

    Hector Rivera
    I have a customer that is asking the following question. We are contemplating to have 2 new designs based on the C667x multicore DSP. We are going to use the chips 2 lanes PCIe interfaces directly connected to the host running Windows 7 OS. We would like to know if TI has a PCIe driver for Windows...
    on Jan 28, 2013

  • Forum Post: IIR Filter

    engin kavak
    Hello I designed an IIR filter. It works quite well. However I have a problem related to my input data type. My input data changes between 0x0000 and 0xFFFF. In some cases overflow occurs in my data input when passing from 0x0000 to 0xFFFF or from 0xFFFF to 0x0000 . This is a boundary change, of cource...
    on Feb 27, 2013

  • Forum Post: ECC Enabling

    Avinash Neethi1
    Dear All, We were currently working on TMS320C6678 processor. I want to enable the ECC option for certain verification. What is the procedure to enable the ECC in GEL file as well as in IBL file. If any one tried, Tell us the procedure . Regards, Avinash N
    on Mar 15, 2013

  • Forum Post: HARD reset using C6670 Watchdog timer

    skyc0lour
    Hi, I have been trying to generate HARD RESET to C6670 using watchdog timer when it times out. So far i have managed to run the watchdog timer and once it times out i can see WDFLAG bit of WDTCR is getting set. However nothing happens to CCS. I would expect PC to go hit internal ROM. Again RSTTYPE...
    on Mar 19, 2013

  • Forum Post: About 6671 MSM

    Zhendong Bai
    I'm developing an application use C6671. As we know, apart form L1 L2 RAM, the 6671 has extra 4M-Byte MSM(multicore shared memory). According to the Data sheet(SPRS756C), MSM can be configured as shared L2 and/or shared L3 memory. My question is: 1.If i want to use MSM as another L2, how to do...
    on Mar 20, 2013

  • Forum Post: RE: About 6671 MSM

    Zhendong Bai
    Thanks for your reply. I will check the Datasheet you provided. Could you tell me what is the difference between CorePac L2 and Local L2 on the 6671? In my oppinion, there is the only one core on 6671 ,but why they have different physical address (for Corepac L2 and Local L2 )? Thank you again.
    on Mar 21, 2013

  • Forum Post: NDK Hello World example for C6678 on simulator using CCSv5

    Harsha J K
    Hi All, I am new to DSP platform as well as networking. I successfully ran the NDK example given in the following path : /opt/ti/mcsdk_2_00_05_17/examples/ndk/helloWorld/evmc6678l/ I would like to understand what the code does in detail, as far as i understood it was initializing QMSS, CPPI &...
    on Mar 21, 2013

  • Forum Post: DDR3 Configuration In C6678

    Avinash Neethi1
    Dear All, We were currently working on C6678. In the customer Board there were two C6678 processor. 1GB DDR3 is connected C6678 ( We want to implement a 64 bit interface based on x16 bit DDR3 chips, therefore requiring 4 devices ). The routing length between the DSP1 and DDR3 , DQS signal Length...
    on Apr 15, 2013

  • Forum Post: RE: DDR3 Configuration In TMS320C6678 REV-2.0

    Avinash Neethi1
    Hi Aditya, We are using the same DDR3 part numbers on both your Rev2.0 and Rev1.0 boards. In our third customized board Both the DSP processors are REV-2.0. But in the third board also i can't able to access the 3rd DDR3 chip in DSP2. But I can able to access the 64-bit in DSP1 to DDR3. The...
    on Apr 22, 2013

  • Forum Post: RE: EMAC port 0 of 6678EVM via MicroTCA

    Yanuar Nugraha
    Dear guys, I just got my EVM C6670 several weeks and now, I want to use PA_emacExample for receiving UDP packets generated by my PC using RJ45 port, which means I will be using EMAC Port-1 from now on. At this state, I am successfully running these cases: LOOPBACK_INTERNAL and EXTERNAL, and LOOPBACK_NONE...
    on May 2, 2013

  • Forum Post: SOC Family details

    Sarala P
    Hello All, Why TMS320C6670 SOC is called as Nyquist family and Why TMS320C6678/6674/6672 SOC is called as a Shannon family?What is the significance of this names? Reg, Sarala
    on May 9, 2013

  • Forum Post: DDR3 Intialization

    Avinash Neethi1
    (Please visit the site to view this file) (Please visit the site to view this file) Hi, We have planed to manufacture new board with TMS320C6678. I have described the problem we face in the last bord below. In our last customized board we used Two TMS320C6678. Each DSP processor consist of 1GB...
    on May 20, 2013

  • Forum Post: RE: Communicating EMAC Port 0s

    Xindong Yao
    hello,I also work with this project with the same feature as yours,but i haved tried two weeks without anything successed ,can you explan more detail about the " i exchange the src mac address and dst mac address values for pktMatch[] in cppi_qmss_mgmt.c" in both the DSPA and DSPB. thank you...
    on May 20, 2013

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