C6000 Multicore DSP

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TMS320C66x
Related Posts

  • Forum Post: Re: DDR3 on 6678 EVM

    Tom Johnson16214
    The BOM is not yet available for the C6678 EVM. The C6678 EVM is designed to support a full 72-bit memory topology (includes ECC bits) using JEDEC-compliant DRAM devices. It is implemented using x16 DRAM devices for the data and either a x16 or a x8 DRAM device for the ECC memory. Initial EVMs will be...
    on Nov 29, 2010

  • Forum Post: C6678 Power Consumption

    Noam Stein
    What is the (Maximum/Typical) power consumption for every power type of the C6678? Is the "KeyStone Power Consumption Summary" application report (SPRABF2) mentioned in the hardware design guide (Pg. 43) available? Thanks, Noam
    on Dec 13, 2010

  • Forum Post: Re: C6678 Power Consumption

    Noam Stein
    SPRABF2 (Not SPRABF1). Open the " Hardware Design Guide for KeyStone Devices " at page 43. It's on the web page you posted (PDF 15730 KB). BR, Noam
    on Dec 14, 2010

  • Forum Post: Re: 6678 Smart Reflex Supply

    Tom Johnson16214
    The TMDXEVM6678L EVM design for the TMS320C6678 DSP is still in the pre-release phase. Once the design has stabilized, the design collateral including the UCD9222 configuration will be posted for download. Customers receiving early samples should contact their sales FAE for support.
    on Mar 16, 2011

  • Forum Post: TMS320TCI6618 - docs needed for MN and INTC

    Ruslan Senyushkin
    Hi, in http://focus.ti.com/lit/wp/spry161/spry161.pdf whitepaper I see following: For example, Multicore Navigator is able to schedule jobs and instruct the next free DSP core to read a job and process it without the need for external management. This simplifies the SoC’s software architecture...
    on Apr 14, 2011

  • Forum Post: Using CSL EDMA3 with interrupts

    Ya D
    Hi, I am trying to configure a edma3 transfer with a transfer completion function. I found an example for such code but I receive an error in the following line: hIntc = CSL_intcOpen (&intcObj, CSL_INTC_EVENTID_EDMA3CC_GINT,&vectId , NULL); Error: identifier "CSL_INTC_EVENTID_EDMA3CC_GINT"...
    on Apr 22, 2011

  • Forum Post: C6678 Thermal Data

    Noam Stein
    Hi, Is there anything new on the C667x thermal data? Junction-to-case resistance? Junction-to-board resistance? It's in TBD in the formal documentation from last November. Thanks & BR, Noam
    on May 23, 2011

  • Forum Post: TMS320C66x EMAC IEEE1588 support

    Igor Bannikov
    Tell me please if there is a representatiive description of TMS320C66x EMAC IEEE1588 time synchronization module?
    on Jun 8, 2011

  • Forum Post: Re: TMS320C66x EMAC IEEE1588 support

    Derek Brown
    Igor, The IEEE 1588 rtfclk_sel should be shown in the data manuals. As you stated, this information is currently missing, so thank you for brining it to our attention. We are currently working to add this information to the data manuals. I am not sure when the updated data manual will be released...
    on Jun 13, 2011

  • Forum Post: Bit Rate Coprocessor User Guide

    Mehly
    Hi, in the TMS320TCI6618 Communication Infrastructure KeyStone SoC Data Manual (SPRS688 - February 2011) on page 189 (chapter 7.26) is a reference to the User Guide of Bit Rate Coprocessor. Where can i find this document or some closer information about this coprocessor? Thanks a lot
    on Jun 20, 2011

  • Forum Post: Latency of data transfer between L1D/L2/DDR3/Shared Mem

    john
    Hi, Please tell me the process how to measure latency in cycles of data transfer of 256kbytes between L1D/L2/DDR3/Shared Mem . it is related to creating memory sections in cmd file. I dont know how to do it. working DSP is 6616
    on Jul 12, 2011

  • Forum Post: Need help with enumerating EVMC6670L assembled with TMDEXEVMPCI

    James Bonuan
    Hello, We have the EVMC6670L assembled with TMDXEVMPCI AMC-PCIe adapter card, set up for PCI-e boot using switch settings, and installed in a HP x8600 workstation server class PC running Fedora 10 Linux. We've followed the procedures as documented in the PCIe Boot Example that came with MCSDK...
    on Jul 18, 2011

  • Forum Post: Re: SRIO, and response Msg Ftype13

    C. García
    Travis, Please, could you answer the following questions related to C6678: 1.- How to see the feedback that the transfer has been performed without errors? If I don't have the possibility for seeing the response Ftype 13, should be a way to see for each case that requires response that the...
    on Jul 22, 2011

  • Forum Post: Allocating memory for arrays on TMS320C6670

    FeruzM
    I have started work bit on TMS320C6670, and Have trouble with using malloc. Could anybody explain or give some example of how it is done on DSP (malloc)? My guesses are maybe I should tweak memory linker command file, or required programming approach is different. Thank you in advance!
    on Jul 29, 2011

  • Forum Post: Re: FFT co-processor benchmark

    kenshow
    Hi Chad, Thanks for good information. However, I couldn’t understand the meaning of the units in the table. Please let me know what these units mean and the relation. Best regards, Kenshow
    on Aug 2, 2011

  • Forum Post: Re: SRIO FType9 64KB data payload test.

    C. García
    Hi, I post again the message from july 31th: I'm trying to run only the test_sock9 with 64KB data payload (the maximum possible for FType 9) in the SRIO_Loopback. I succeeded to run modify it up to 4K bytes, but no more. The changes I made in the file test_main.c are: #define MULTISEGMENT_DATA_SIZE...
    on Aug 4, 2011

  • Forum Post: Re: SRIO FType9 64KB data payload test.

    C. García
    Travis, In the MCSDK version 02_00_01_11 there is the following example: C:\Program Files\Texas Instruments\pdk_C6678_1_0_0_11\packages\ti\drv\exampleProjects\SRIO_LoopbackTestProject Please, could you import the TI SRIO_LoopbackTestProject from the first folder into a workspace and check where...
    on Aug 7, 2011

  • Forum Post: Re: SRIO FType9 64KB data payload test.

    C. García
    Tim, Travis I changed the heap to MSMCSRAM and now is working with data payload of 64KB. I meassured the time for 16KB with the heap configured in MSMCSRAM and I observed that is four times slower than the same meassure with the heap configured in L2SDRAM. I supposed that must be slow but...
    on Aug 10, 2011

  • Forum Post: SRIO configuration

    C. García
    Hi, I'm working with the internal loopback example found in the folder: C:\Program Files\Texas Instruments\pdk_C6678_1_0_0_11\packages\ti\drv\exampleProjects\SRIO_LoopbackTestProject 1.- Could you tell me, please, which is the SRIO Bit Rate configured? 2.- Could you tell me, please, which...
    on Aug 10, 2011

  • Forum Post: Re: Failure when using both GateMP and Intc

    Dongning Li
    Instead of using "ti.sysbios.hal.Hwi", I used "ti.sysbios.family.c66.tci66xx.CpIntc" to handle Edma transfer completion. The latter is similar to Intc in CSL. However, I could not have my plugin gets called. I find that the module of "ti.sysbios.family.c66.tci66xx.CpIntc"...
    on Aug 18, 2011

  • Forum Post: C6678 has disappeared from list of devices in CCS

    Andy Faithfull
    I am using CCS 5.03 with a Blakhawk XDS560v2-USB Mezzanine emulator and an EVMc6678LE board. For some reason, when I opened up the project today, it showed an error on the ccxml file. It says there are no debuggable cpus. I have tried to fix the ccxml, and then to generate a new one, but the C6678...
    on Aug 23, 2011

  • Forum Post: TMDXEVM6678L Smart Reflex Circuit

    Courtney Cooley
    I have a couple of questions regarding the Smart Reflex power circuit used on the TMDXEVM6678L eval board… 1. The four VID2 pins of the UCD9222 device are connected to the FPGA. I believe these pins are used to control the dynamic voltage on the associate rail. Since the voltage on Rail#2...
    on Aug 29, 2011

  • Forum Post: Re: Getting started with EVMc6678 issue...

    Mohamed Sohal
    Dear Arun, I tried like what you said. and i got this error....
    on Oct 3, 2011

  • Forum Post: How to view a romfs image, created by the MAP/MAD tool, in Windows?

    Marty
    My host is a Windows 7 (64 bit). I am using the MAP tool provided in CCS to create a combined (romfs) image containing the mad/nml elf loader and some apps for a C6678 DSP. What is the most convenient way in Windows to view its contents? Primarily I just need to list its contents ("ls"...
    on Oct 24, 2011

  • Forum Post: [TCI6618/6616] Boot parameter table of two-level bootloader using I2c and Ethernet

    Eric Liang
    Hi all, I am working on TCI6618's bootloader using I2c and Ethernet. But I can NOT make out the correct boot parameter table of Ethernet boot. By reading the user guide of bootloader (2011 version), there are several parameters not found in the GbE user guide, such as SGMII Rx / Tx / Aux Cfg register...
    on Nov 4, 2011
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