C6000 Multicore DSP

Browse by Tags

C6000 Multicore DSP

Welcome to the C6000 Multicore DSP Section of the TI E2E Support Community. Ask questions, share knowledge, explore ideas, and help solve problems with fellow engineers. To post a question, click on the forum tab then "New Post".

Tags
You have subscribed to this tag. To view or manage your tag subscriptions, click here.   Close
You have unsubscribed from this tag. To view or manage your tag subscriptions, click here.   Close
You are currently viewing:
boot
Related Posts

  • Forum Post: C6474　BOOT

    ATSUSHI TANAKA
    Please teach a boot method of multicore. I want to boot core 1 with core 0 after a boot with core 0 in I2C master boot. I want to write in a program at internal ram (0x00800000)of Core1. As for internal ram, all the addresses become 0x00800000, but how should set it for access to internal...
    on Feb 6, 2010

  • Forum Post: C6474 boot check sum

    ATSUSHI TANAKA
    Please teach it about ones complement check sum.
    on Feb 8, 2010

  • Forum Post: C6472/TCI6486 EMAC boot

    sungyi chen
    To whom might concern, Does anyone have experience or example code for EMAC boot for C6472? For me understanding from SPURA7D, EMAC boot require EMAC boot parameter table. DSP EMAC will sent Ethernet-Ready announcement format packet to host processor. host process should response EMAC...
    on Jun 11, 2010

  • Forum Post: How DSP knows that all the packets has been received in EMAC boot mode.

    Shirley Yang
    HI, I need to know how the DSP knows all of the packets of information have been received in EMAC boot mode. We are using TMS320C6474 and from the bootloader manual (SPRUEC6D) I know that for SRIO boot method, the master will issue a door-bell message to DSP so DSP knows configuration is done. But...
    on Aug 13, 2010

  • Forum Post: Nandboot for multicore sample application

    NARESH PATEL
    Hi, I have small sample application. I write it to Nand by using nand writer . Then after i perform nand boot . Application runs only for core 0.I want to run it on all six cores. Is it possible and how it is ? Thanks
    on May 4, 2011

  • Forum Post: Re: Booting from NAND on evm6678l

    r_robotics
    We have two EVMC6678 boards. One seems to be a bit flaky. Repeating the steps on the other board provided much more sane results. However, after board reboot, no program seems to load. Again, the basic steps I'm doing are: Compile and test program create a *.dat file from *.out Write...
    on May 16, 2011

  • Forum Post: Re: evm6474 bootloader procedure

    tscheck
    A SRIO boot example can be found at: http://processors.wiki.ti.com/index.php/C6474 click on the Boot Test Package link. Regards, Travis
    on May 17, 2011

  • Forum Post: Re: Booting from NAND - round 2

    tscheck
    A couple things to check, it's hard to tell from the quick summary of steps above... First, the *.dat format is not the actual format to load into NAND, but if you followed the steps in: C:\Program Files\Texas Instruments\mcsdk_2_00_00_beta2\tools\writer\nand\docs\README.txt it should program...
    on Jun 2, 2011

  • Forum Post: Multicore program not boot c6472

    Ricardo Leber
    Dear people of the forum, I was working on a program that uses 3 cores of a c6472. This sample program works ok from the CCSv4 and the emulator. It does not work (BOOT) from the NAND flash memory that brings the EVM. If we change the sample program to use only the core 0, the sample works from the CCSv4...
    on Jun 2, 2011

  • Forum Post: Re: SRIO Issues on EVM6678

    Jean-luc
    Justin, I'm a newbie here, sorry if I'm not in the right thread. I'm very interested to sRIO and PCIe general setup. Please could you give me the TI link to download the pdk_C6678_1_0_0_9_beta2 package, I found the looback SRIO over socket example interesting, but I would like to...
    on Jun 8, 2011

  • Forum Post: Secondary Boot with PLL fix

    Jim Rondero
    Hello, In order to perform Ethernet boot, I wish to program the i2c eeprom on my EVM with the secondary boot example instead of the IBL. When running the secondary boot in debug mode it works a sends the BOOTP package as expected. But when I use the make file supplied and program it to the eeprom...
    on Jul 5, 2011

  • Forum Post: U boot training

    NARESH PATEL
    Hi, Could ti provide online u boot training ? If anybody know then post link. Thnaks -Naresh
    on Jul 12, 2011

  • Forum Post: Booting a Sys/Bios application

    Jim Rondero
    Hello, I trying to boot a Sys/BIOS application from the NOR flash on the C6678 EVM, but with no success. I already booted the nor boot example and the post example. Now I compiled the BIOS Hello world template an made it write to the UART, but no matter what I try to do it doesn't work....
    on Jul 26, 2011

  • Forum Post: Re: Nandboot for multicore sample application

    Ricardo Leber
    Dear Sandeep, I thank you for all the help you gave me. The development in which I am working is far more complicated than the example project of the LEDs. So it took me longer work, due to the location of the vectors and variables that should be in a shared area and others in local memory. The program...
    on Aug 8, 2011

  • Forum Post: Re: C6678 SRIO Boot

    Raj Sivarajan
    Brian, Also, there is a SRIO boot example in BIOS-MCSDK. Once you install the SDK, the default location is: C:\Program Files\Texas Instruments\mcsdk_2_00_0x_xx\tools\boot_loader\examples\srio This is a multicore example that uses DDR. At the end, you will see an output indicating a "Hello...
    on Sep 22, 2011

  • Forum Post: 6472 NOR flash boot

    ilia turets
    is the any option to boot the 6472 with NOR flash instead of NAND? does TI provide any utilities for that?
    on Oct 25, 2011

  • Forum Post: C6474 EVM I2C Boot Problem

    Ho-Jung Bae
    Hi, I have a problem in booting my C 6474 EVM. I finished my application project and generated a .out file, and I use the Boot Image Handling Utilities for C6474( Boot Test Package) I followed Package Readme.txt. The following are detailed steps for I2C boot: 1. Remove .gel file in your...
    on Oct 26, 2011

  • Forum Post: [TCI6618/6616] Boot parameter table of two-level bootloader using I2c and Ethernet

    Eric Liang
    Hi all, I am working on TCI6618's bootloader using I2c and Ethernet. But I can NOT make out the correct boot parameter table of Ethernet boot. By reading the user guide of bootloader (2011 version), there are several parameters not found in the GbE user guide, such as SGMII Rx / Tx / Aux Cfg register...
    on Nov 4, 2011

  • Forum Post: TMSC6678 bootloader info

    shrish mv
    hi, i am working on shannon evm c6678 ..SDK used are MCSDK 2_00_00_11 and pdk_c6678_1_0_0_11. I am studying the bootloader source present on mcsdk >tools>bootloader>ibl>src . Is there any document on how the bootloader is built ? ie how the different components are called and ...
    on Dec 5, 2011

  • Forum Post: Re: NOR Boot Problem in EVMC6678L (Rev1.0)

    tscheck
    A couple of comments: - First, update your MCSDK to the latest version: http://software-dl.ti.com/sdoemb/sdoemb_public_sw/bios_mcsdk/latest/index_FDS.html Your version is very old. The NOR writer procedure is different and may contain bug fixes from the version you are using. - It sounds like you...
    on Dec 15, 2011

  • Forum Post: Re: PCIe BAR Window Sizes for PCIe Boot

    Jonathan White
    Can someone at TI please answer the above question of 10th November. As I mentioned, the documents are unclear and inconsistent. In addition, I have been experimenting on an EVM board without the IBL installed (because the IBL would override the BAR Config DIP switches). The results (without IBL...
    on Dec 28, 2011

  • Forum Post: bootloader PLL workaround doubt

    shrish mv
    Hi all, I am using Shannon EVM c6678 , MCSDK 2_00_00_11 , and pdk_C6678_1_0_0_11. I have the following doubt with respect to the bootloader. In the TMS320C6678 silicon Errata it is mentioned that for boot modes other than i2c and spi, the bootloader should perform PLL workaround for stable...
    on Dec 29, 2011

  • Forum Post: Re: PCIe BAR Window Sizes for PCIe Boot

    Jonathan White
    Hi Arun, I checked the BAR window size as follows: Using a “fresh out of the box” EVM, set to PCIe Boot mode, I reset the EVM and use CCS to read the BAR registers, observing “all-zeros”, except that the prefetch bit is set for BAR 0. I then write 0xFFFFFFFF to each BAR...
    on Jan 11, 2012

  • Forum Post: Re: PCIe BAR Window Sizes for PCIe Boot

    Jonathan White
    Hi Arun, we know about the PLL Lock issue and the FPGA workaround. We have some EVMs that were re-flashed by us as mentioned in the PCIe doc, and some that are “fresh from factory” (i.e. not re-flashed). All of our EVMs boot properly. We see the 0x20BXXXXX address at the end of boot (non...
    on Jan 11, 2012

  • Forum Post: Hex6x NOR Flash Boot 6678

    Daniel S
    Hello. I am new to using the hex6x generation tool and boot code in general. Can anyone help me with the param settings? I want to boot the C6678 from EMIF NOR Flash (0x7000_0000). The flash is in 16 bit mode. The code is compiled/linked to run in L2SRAM (0x0080_0000) and runs well when loaded with emulator...
    on Sep 8, 2012
123

All content and materials on this site are provided "as is". TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with regard to these materials, including but not limited to all implied warranties and conditions of merchantability, fitness for a particular purpose, title and non-infringement of any third party intellectual property right. TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with respect to these materials. No license, either express or implied, by estoppel or otherwise, is granted by TI. Use of the information on this site may require a license from a third party, or a license from TI.

Content on this site may contain or be subject to specific guidelines or limitations on use. All postings and use of the content on this site are subject to the Terms of Use of the site; third parties using this content agree to abide by any limitations or guidelines and to comply with the Terms of Use of this site. TI, its suppliers and providers of content reserve the right to make corrections, deletions, modifications, enhancements, improvements and other changes to the content and materials, its products, programs and services at any time or to move or discontinue any content, products, programs, or services without notice.

TI Worldwide | Contact Us | my.TI Login | Site Map | Corporate Citizenship | mobile m.ti.com (Mobile Version)

TI is a global semiconductor design and manufacturing company. Innovate with 100,000+ analog ICs and
embedded processors, along with software, tools and the industry’s largest sales/support staff.

© Copyright 1995-2013 Texas Instruments Incorporated. All rights reserved.
Trademarks | Privacy Policy | Terms of Use