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Unconnected JTAG pins problem

On current design we have discovered a possible problem with TCK signal on DM355. The datasheet gives conflicting characteristics for the TCK pin in two different tables. In one table (Table 2-22. Emulation Terminal Functions) the pin does not have pull-ups of pull downs. According to another table (Table 2-23. DM355 Pin Descriptions) the pin has a pull-up. Our boards do not have a JTAG connector and the JTAG pins are left unconnected as recommended by TI.

We got the DM355 EVM board and checked the TCK pin by measuring voltage to ground. The multimeter showed around 0.1V. We measured TCK pin to VCC and we got the same value. It looks looks the pin does not have a pull-up. Can anybody from TI confirm that? If that is the case do I heed to connected my external pull-up? Pull-down?

On one of our products (several years in production) we started experiencing unusually high power consumption during deep sleep mode, somewhere around 21mW vs "advertised" 3.3mW. After checking the currents for 1.3V and 1.8V supply rails (replaced EMI filters with low Omhs resistors), removing almost all peripheral I/O ICs we narrowed it down to 3.3 VCC power pins on DM355. Estimated current is about 7mA. We double-checked all I/O configurations (defined unused as outputs, match pull direction if present). Some boards work as expected. Others vary significantly pulling somewhere between 6mW and 21mW during deep sleep. The boards are from the same production batch and otherwise appear to be working.

Another set of pins in question is RSV01-RSV04. Looking at the EVM schematic, the pins appears to be differential signals. We have those pins left unconnected as mentioned in the datasheet. Is it really OK to leave those pins unconnected?

  • Hi,

    Thank you for your e-mail

    We are reviewing your questions and will get back to you

    Cesar

  • Hello,

    The TCk pin is an input.   If you are trying to make sure the JTAG is not in use, the TRST signal normally has a pulldown, you can use an external 1K pulldown to VSS.

    The other JTAG pins if unused can be left disconnected.

    Related to DEEP Sleep there are GPIOs that trigger sleep and wake up.   Please check these first.   Other than that, we would have to ask the characterization engineer how the Deep Sleep power consumption is tested.

    The RSV pins 01,02,03,04 are LVDS inputs.   The datasheet indicates they can be left unconnected or tied to VSS.   The EVM has these as unconnected pins.

    Regards,

    Joe Quintal

  • From your first paragraph, do I need to have a pull-down on TCK or TRST? According to Table 2-22, TRST already has an internal pull-down.When it comes to TCK pull resistor, which table in the datasheet is correct, the one that mentions PU on TCK or the one that indicates that there is no PU/PD on TCK?

    All GPIOs are defined as needed including GIO0 that is used to wake up DM355. The processor on our boards goes to sleep and wakes up as expected. It is just in deep sleep, we encounter current consumption varying significantly from board to board with some at a level when we have to reject the board.

    Can you clarify RSV01-04 pin characteristics. According to the datasheet, they do not have pull-ups or pull-downs. What kind of input is that that can be left unconnected? If unconnected can the voltage on the pin start floating and cause increased current draw through the input pin circuit? Same goes for TCK pin.

    Thank you.
  • Hello,

    If your device is turning on and seeing the TCK have a clock, and TMS is '1', for at least a few clocks, this enters the JTAG 1149.1 test mode.   Since the operational inputs are not used for logic in JTAG test, you would notice, some functional difference.   If there is an oscillation at the TCK input pin, you would see clocked outputs at the TDO output.  

    If the TRST pin is '0' (using the internal pull down), or pulled low through a 1K resistor, the JTAG controller is held in reset for operational mode.

    Ideally Table 2-22 and Table 2-23 should both have the same TCK designation.  They both have the same TRST designation.

    If you see devices that power up in JTAG mode, using a 1K pull down resistor for TRST, should place the JTAG controller in reset.   If you are trying to test for minimum power usage, you could try a 1K pull down for TCK, that would increase your power use though.

    Recommendation - you could try the pull down resistors to see if there is an affect on your deep sleep dissipation.   I don't expect the TRST to be a '1'. or you could power up in JTAG test mode, if TCK is not terminated.

    The second question - we have asked for our Product Test Engineer to comment,  I have not received an answer yet.   If you have a board that works, and has proper dissipation for deep sleep, and a board that has higher dissipation, you could remove the known good DM355, reball it, put it on the bad board and retest.   If the bad board with the known good part, shows good deep sleep performance, then you have isolated this to a DM355 part, you would need to send higher dissipation parts back for testing.  I have no experience testing deep sleep, this fault isolation is used for other customers to prove a board, or part problem.

    I have forwarded this question to my manager, as I need the PTE contact.

    The third question - on the Spectrum Digital EVM sheet 5, these are left as unpopulated RSV01,02,03,04.   The datasheet says leave open or tie to VSS.   It is possible for high impedance pins to develop charge and cause current to be consumed, you could test them by connecting to VSS.   

    The 100 ohm resistors are used for specific loop current style differential inputs, typically LVDS.   Normally terminating LVDS as a logic '0' involves adding a pullup resistor to In-, an internal loop current or added 100 ohm resistor In- to In+, and connect a pulldown to In+.   I would try terminating them to VSS (GND) first.

    Sorry this is not directly answering your question, I do not have access to RTL to look at the TCK pullup or RSV0102, 0304 input buffer style.

    I will ask again about the Deep Sleep question internally

    Regards,

    Joe Quintal

  • I don't think we have a problem with TMS or TRST pins as those seem to have proper pull-down (measured on EVM). It is just the TCK input is not "acting" like the other. All the other JTAG inputs have proper pull-ups/downs when measured on EVM. In our design, the JTAG connector is not routed and we have no way to connect any pull resistors.
    The concern here is that if TCK has no pull resistor it can cause increased current consumption like any other unconnected input pin without a pull resistor. That is why I want to have a clarification on what is the proper way to handle the TCK pin when JTAG is not used as there seem to be contradicting information in the datasheet. I know that ideally there should be no errors in the datasheet. However, when there are two tables saying contradicting things it would be nice to know which one is correct. I was hoping TI would be able to easily answer that question.
  • Hello,

    We are trying to find a design engineer, with access to the chip-internals to answer this question.   We started the search for this in December, when we tried to answer your question from a system level.  We have not found one yet.

    When you have measured TCK on the EVM, (to make sure I understand) you do not have a weak pullup or pulldown.   If you turn on the EVM, and measure the voltage at the TCK pin it does not measure a logic '0' or '1' like the TMS pin?

    The only suggestion I have is to try to modify one of your higher current boards, to add a pulldown 1K to TCK, and see if the current changes; or

    Measure the sleep current on the EVM, if this appears correct, you can swap one of your higher sleep current SOCs into the EVM and retest.

    Regards,

    Joe Quintal

  • Hello,

    One of the catalog processor engineers has looked up the internal document, and found that the Tck does not have a pullup, or pulldown

    I have indicated internally that the datasheet for Table 2-23 should be updated.   Please try to pulldown Tck for you deep sleep problem, if that helps.

    Regards,

    Joe Quintal

  • Hello again,
    In further discussions with the catalog processor engineers, there are two recommendations:
    a) review your pin/mux IO assignment to make sure all unused IO is set to output.
    if there is an unused input, that does not have a pull up or pull down, tie it to GND

    b) we discussed taking a board+SOC that meets your low power deep sleep requirements, remove the SOC.
    on a board that has a higher power than required, remove its SOC, swap the SOCs on your boards, to see if the problem
    tracks with the SOC. If it does, work with your local FAE and schedule to have the bad SOC retested, to see if the problem
    is detectable by Product Engineering.

    Regards,
    Joe Quintal