Hello,
I'd like to use the DM385 MCASP module to act as an I2S receiver. For the master clock input, the reference manual mentions a AHCLKR pin that can be used for this clock input. However, the DM385 datasheet does not assign any ball number to the AHCLKR signal. Does the AHCLKR signal exist on the DM385? There is a mention of the AHCLKR signal in the datasheet in the timing requirements section.
Otherwise, I think the I2S receive mapping is as follows:
LRClock input - MCA[0]_ASFR - AF30
I2S0 Data input - MCA[0]_AXR[0] - AF29
Bitclock input - MCA[0]_ACLKR - AD30
Are these correct?
Thanks.
