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TI Home » TI E2E Community » Support Forums » Digital Signal Processors (DSP) » DaVinci™ Video Processors » DM37x DaVinci Video Processor Forum » DM3730 GPMC Memory Problem
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DM3730 GPMC Memory Problem

This question is answered
john tyler
Posted by john tyler
on Apr 30 2012 11:42 AM
Prodigy50 points

Hello,

I have a problem viewing static ram chip off of GPMC bus.

I am using the Lauterbach emulator and setting up the nCS2 signals with nADV, nWE and nOE with a scope and they all look good.

I am using address/data multiplexing.  If I disable MUXADDDATA I can read and write memory in the CS base address.

If I enable MUXADDDATA I then cannot write memory and when I view memory it is sequential numbers in memory which I cannot change.

Is there any suggestions I can try ???

My address and data lines are setup in hardware for extended addressing using data-lines as A1 thru A16 and A1 thru A8 as A17 thru A24.

And I am using the 16374 for multiplexing the data-lines to address-lines.

Please help - because I am behind in my project.

Thanks in Advance,

John

 

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  • john tyler
    Posted by john tyler
    on May 02 2012 16:30 PM
    Verified Answer
    Verified by john tyler
    Prodigy50 points

    Hello All - It is fixed !

    Turns out I had 2 transceivers being enabled by nOE and they were colliding on the data bus.

    All I had to do, once my hardware was fixed, was to set the base address for CS2 in the GPMC and enable the ADDDATAMUX.

    All can be easily configured in the Lauterbach emulator and then the read/writes on the GPMC bus to my static RAM worked!

    Thanks,

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  • john tyler
    Posted by john tyler
    on May 02 2012 16:32 PM
    Verified Answer
    Verified by john tyler
    Prodigy50 points

    I also inverted the nADV going to the clock of the 16374 multiplexer.

    Thanks

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