Hi!
I'm trying to organize synchronous burst-read (8*16bit pack) from FPGA (via GPMC) to memory (using DMA).
My OS is angstrom linux (v 2.6.32)
Init code:
gpmc_cs_request(4,SZ_16M,&fpga_mem_base);fpga_mem_remap = ioremap(fpga_mem_base,SZ_4K);
... some PADCONF, GPIO, IRQ code cutted out ...
//-----------------------------------------------------------dma setup p347_fpga_info.dma_par.data_type = OMAP_DMA_DATA_TYPE_S16; p347_fpga_info.dma_par.src_start = fpga_mem_remap; p347_fpga_info.dma_par.src_amode = OMAP_DMA_AMODE_POST_INC; p347_fpga_info.dma_par.dst_start = &p347_fpga_info.DST[0]; p347_fpga_info.dma_par.dst_amode = OMAP_DMA_AMODE_POST_INC; p347_fpga_info.dma_par.dst_ei = 1; p347_fpga_info.dma_par.dst_fi = 1; p347_fpga_info.dma_par.elem_count = 8; p347_fpga_info.dma_par.frame_count = 1; omap_request_dma(77,"p347_fpga_read_dma",p347_fpga_dma_callback,NULL,&p347_fpga_info.dma_ch); omap_set_dma_params(p347_fpga_info.dma_ch,&p347_fpga_info.dma_par); omap_set_dma_src_burst_mode(p347_fpga_info.dma_ch,OMAP_DMA_DATA_BURST_8); omap_set_dma_dest_burst_mode(p347_fpga_info.dma_ch,OMAP_DMA_DATA_BURST_8);
... some GPMC timings code cutted out ...
omap_enable_irq_dma(p347_fpga_info.dma_ch); return 0;
And after omap_start_dma(p347_fpga_info.dma_ch);
I've got "DMA transaction error with device 77"
Can you help me to find a mistake?
I've found two mistakes:
1) memory that pointed by dst_start should be allocated by dma_alloc_coherent
2) src_start should be physical, not remapped
So there is no "transaction error" now, and I've got a dma callback with "block complete" status. But I still have some bugs in code: all data in destination buffer are zeroes.
By the way, no-dma GPMC reading and writing works well.
Konstantin I've found two mistakes: 1) memory that pointed by dst_start should be allocated by dma_alloc_coherent 2) src_start should be physical, not remapped So there is no "transaction error" now, and I've got a dma callback with "block complete" status. But I still have some bugs in code: all data in destination buffer are zeroes. By the way, no-dma GPMC reading and writing works well.
Hi Konstantin,
I currently have a GPMC char device driver (for DM3730) interfacing to a FPGA. I have a loopback test working non-DMA. I am trying to get the DMA working but I am having issues with dma_alloc_coherent().
How were you able to access the struct device for the GPMC which is passed in as the first parameter to dma_alloc_coherent()?
Thanks,
Brent
Hi Brent.
I'm not sure that my code is correct: i've just typed NULL as the first parameter. It works somehow :)
Thanks for the reply. I have seen in other posts where they do that.
http://e2e.ti.com/support/embedded/linux/f/354/t/89978.aspx
I am going to look at the source code for dma_alloc_coherent() to see what it is doing with the struct.
Thanks again,
Did you ever get this to work?
Brent, yes, it works (with changes from my 2nd post here). I don't remember what actually I changed after this... What problem do you have now?
I am just starting to look at implementing DMA again (had it working without and that was good enough at time).
I am going to start with how you were able to get it working.
I looked at your other post, did you find out the reason for the delays in bursting??
And thanks for responding! I might have a question in the future.
Brent, i don't remember for sure what we did that time. For now we have a DMA pack of 256 bursts working on 80MHz GPMC_FCLK.
And pause between bursts for now is stable (~125ns). It equals 10 clock ticks (cycle2cycle delay = 1 tick).