This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Does secure software supports L2 Cache clean-and-invalidate in dm37xevm

In TRM of dm37xevm (Article 26.4.1), there is a hint about the L2 cache invalidate.

Is there some instructions availabel for clean-and-invalidate of L2 in "secure software"? Is is possible under "secure software"?
Is there any errata available related to cache maintaince for cortex-a8 present on chipset in dm37xevm.

Regards