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TI Home » TI E2E Community » Support Forums » Digital Signal Processors (DSP) » DaVinci™ Video Processors » DM37x DaVinci Video Processor Forum » All Tags » 3730
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DaVinci™ Video Processors

Welcome to the DaVinci™ Video Processors Section of the TI E2E Support Community. Ask questions, share knowledge, explore ideas, and help solve problems with fellow engineers. To post a question, click on the forum tab then "New Post".

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Related Posts
  • Forum Post: DM3730 (CUS package) support MIPI DSI panel?

    changjin xia changjin xia
    Hi, DM3730 (CUS package) has no VDDA_DSI power pin, which is used in MIPI DSI PHY. Could you confirm for me that whether DM3730 ( CUS package) support MIPI DSI panel? When run omapdss_dsi_display_enable(), it print the failed log "omapdss DSI error: failed to set complexio power state to 1 "...
    on Jun 13, 2012
  • Forum Post: Code porting service request

    std std
    Hi TI, My company might need to engage TI's service to port OpenCV functions to run on TI DSP core. Our local TI office cannot support us. Please provide an email address or contact for us to contact TI directly. We would like to find out the fee or contract terms for TI to port OpenCV functions...
    on Apr 18, 2012
  • Forum Post: DSP utilization rate

    std std
    Hi TI, How to check the DSP loading or utilization rate ? I am using Linux SDK. Thanks, Mr Tan
    on May 4, 2012
  • Forum Post: How to change stack and heap size for ARM programming in DM3730 Linux SDK

    std std
    Hi, How to change the stack and heap size in the makefile ? Thanks, Mr Tan
    on May 17, 2012
  • Forum Post: Camera ov5640

    yuanjun ren yuanjun ren
    Hi,all platform: EVM 3730 os:wince 6.0 BSP:BSP BSP_WINCE_ARM_A8 1.01.00.03 camere: OV5640 In my camera driver, When I use the YUY2 format , the preview is ok, but when I use UYVY format,the Preview is abnormal. I OMINVISION FAE tell me that OV5640 Register settings is ok. what is the reason?
    on Jun 12, 2012
  • Forum Post: RE: Can DM3730 supports 16G Nandflash

    yuanjun ren yuanjun ren
    Thank you very much for your reply, whether the one-nand driver in Wince bsp 6.15.00 relates to e.MMC.
    on Aug 18, 2012
  • Forum Post: which pad mode on saving power consumption

    yuanjun ren yuanjun ren
    Hi,all plateform:DM3730. DM3730'pads support eight mux modes, The safe mode is used mainly as default mode.whether the safe mode is better than other modes (for example,GPIO mode) about saving power consumption? To save power consumption, Which mode do I need to configure.
    on Aug 18, 2012
  • Forum Post: Does DM3730 ICS support Android Open Accessory via USB?

    XJ Gan XJ Gan
    Hi all, About the 'AOA' please refer to 'http://developer.android.com/tools/adk/aoa.html'. The 'AOA' framework seems to be integrated into Android since 3.1, but the kernel of ICS we downloaded from the rowboat repository may not support it. That maybe causing for the absence...
    on Sep 25, 2012
  • Forum Post: Streaming h264 video from one DM37x to another DM37x

    Richard A Hendricks Richard A Hendricks
    I am working on a demo to stream video from one DM37x to a second DM37x. I have it mostly working, except the receiving DM37x seems to buffer the incoming data for several minutes, then plays back all the buffered data in a few seconds before stopping to buffer again. I do not think it is a load...
    on Nov 20, 2012
  • Forum Post: CE - Engine_getConstName> Unable to locate alg "plate" (type "ti.sdo.ce.universal.IUNIVERSAL")

    Tianhe Wang Tianhe Wang
    hi I want add my alg. lib into my dsp server and invoked by gpp side. But I cannot create alg "plate" instance inherits "ti.sdo.ce.universal.IUNIVERSAL". /******************************************************** divided line *************************************************...
    on Dec 26, 2012
  • Forum Post: DM3730 with TVP5158 (108Mhz ITU 8Bit BT656) problem

    Aden Yoon Aden Yoon
    Hi, We've recently ported the DM365's MCVIP drivers to DM3730. It works fine in mode 2CH D1 line interleave at 54Mhz pixel clock. But when we set 4CH D1 at 108Mhz, captures doesn't work correctly since super frame including a meta data is not captured properly. Now I am curious...
    on Apr 24, 2013
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