DaVinci™ Video Processors

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DaVinci™ Video Processors

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GPMC
Related Posts

  • Forum Post: Re: OMAP3530 to DM3730 Migration - package considerations

    Michael T
    Mahdi: In order to answer your question I would need to know exactly what NAND device you will be using, which chip selects you plan to use, etc. Regards, Michael T
    on Feb 4, 2011

  • Forum Post: Re: OMAP3530 to DM3730 Migration - package considerations

    Michael T
    Mahdi: Only a single chip select is needed with a 2Gbit (256MB) NAND device. On DM3730, the GPMC chip select space is specified as 256 MB max for CS0 & CS1 and 128 MB max for CS2-CS7. But these limits do not apply to NAND devices, since they are not directly memory mapped.
    on Feb 7, 2011

  • Forum Post: DM37X EVM NAND

    Armstrong Xu
    Sir, I am new in DM3725, and I plan to use IVA2.2 to accesee the NAND Flash. Can someone very kindly give me a sample code? The deadline is coming. BTW, it seems like the GEL file used for CCSV4.2(am-dm37x_cortexA.gel) could not config the MMU of IVA2.2 properly. For I view the regs by "View...
    on Apr 6, 2011

  • Forum Post: Re: DM37xx with nor flash of Spansion S29NS512P

    Oscar Gomez Fuente
    Hi, Michael. If I use a PoP package for Nand Flash + LPDDR ( MICMT29C4G48MAZAPAKQ-5 IT ), using the top ball of DM3730, and I use a nor flash connected to gpmc_cs0, using the bottom balls of DM3730, nand flash and nor flash will be connected to the same chip select, gpmc_cs0. Right? Is it possible...
    on May 9, 2011

  • Forum Post: DM37xx with nor flash of Spansion S29NS512P

    Oscar Gomez Fuente
    Hi, I am interesting in develop a platform with the DM37xx microprocessor, a POP memory with [4Gb Nand flash + 2Gb LPDDR] of micron: MICMT29C4G48MAZAPAKQ-5 IT and a nor flash of Spansion: S29NS512P (no PoP, externally connected). I'd like boot from nor flash (I have aviable 512 Mbits for...
    on May 5, 2011

  • Forum Post: AM/DM37xx EVM driver library

    Bigtree
    Hi Experts, My company purchased AM3703 EVM and support package for Linux, WinCE and Android. I installed Linux toolchain and supporting SDK package. But I could not find the driver library to configure for example DMA, GPMC or interrupts. At least there should be #defines for the hardware registers...
    on Oct 27, 2011

  • Forum Post: Interference in GPMC bus with Ethernet and NAND Flash in DM3730

    Pablo Fernandez
    Hi all! I've got two questions for you. 1) If I want to use a NAND Flash chip, instead of a removable storage (i.e. SD card, etc.), to house the Uboot, kernel, ... is there any way of burning the images in the chip already assambled on the board? Perhaps through JTAG....? 2)Supossing the...
    on Dec 28, 2011

  • Forum Post: GPMC NAND driver software for bare-metal application

    Norman Beyer
    Does anyone know of any third-party driver software for GPMC NAND on DM3730 or OMAP3530 Socs for a bare-metal application (no Linux or other OS)?
    on Feb 23, 2012

  • Forum Post: Syndrome calculation produced by DM3730 GPMC for BCH ECC

    Norman Beyer
    I'm trying to configure the DM3730 GPMC for the POP Micron MT29F4G16ABBDA3W ONFI 16-bit NAND for BCH 4-bit ECC encoding/decoding. When performing a PROGRAM CACHE operation I cannot get the BCH result registers to match the 52-bit syndrome value generated by the BCH encoding/decoding C-based programs...
    on Mar 15, 2012

  • Forum Post: Re: Syndrome calculation produced by DM3730 GPMC for BCH ECC

    Norman Beyer
    The DM3730 Tech. Ref. Errata document indicates the GPMC 4-bit BCH ECC does not work.
    on Apr 14, 2012

  • Forum Post: SDMA and GPMC Prefetch/WritePost engine configuration for POP NAND Page Programs/Reads

    Norman Beyer
    Does anyone have any hints or working code snippets for this?
    on Apr 14, 2012

  • Forum Post: DM3730 GPMC_A1 sticking high

    Andrew Jones91825
    Hi, I am using the TI DM3730. I cannot get my Dual UART chip to work ( Exar XR16L2751 ). The Dual UART is connected to the DM3730's GPMC bus. It is using GPMC_[A1:A3] for addresses and GPMC_[D0:D7] for data. I noticed that I cannot read back the correct Device ID from the Dual UART chip, even though...
    on Aug 16, 2012

  • Forum Post: Large delay between GPMC DMA bursts

    Konstantin
    Hi! I'm using DM3730 with FPGA (connected via GPMC). My DMA setup: p347_fpga_info.dma_par.data_type = OMAP_DMA_DATA_TYPE_S16; p347_fpga_info.dma_par.src_start = fpga_mem_read_base; p347_fpga_info.dma_par.src_amode = OMAP_DMA_AMODE_POST_INC; p347_fpga_info.dma_par.dst_start = p347_fpga_info...
    on Nov 27, 2012

  • Forum Post: Interfacing GPMC with a SMSC LAN9220 ethernet chip

    David Kvasnica
    Hello, I am in the process of getting a CompuLab CM-T3730 board (contains DM3730 SoC) to run QNX as its OS. This board has an SMSC LAN9220 ethernet chip connected to the SoC via GPMC chip-select 5. CompuLab provides a working Linux OS for their board, and therefore we have been able to review this...
    on Apr 13, 2013

  • Forum Post: GPMC, SPI, DM3730 and FPGA: Deadly mysterious bug in my linux driver

    Konstantin
    software: * angstrom linux kernel, based on TI 2.6.37 release. * codesourcery toolchain v.2009q1 * custom fpga driver, loaded as module hardware: * TDM-3730 module (from Technexion) * custom "mainboard", based on Technexion's blizzardboard custom fpga driver overview: http://p347...
    on Feb 26, 2013

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