DM814x and AM387x Processors Forum - Recent Threads

boot issue on custom DM8148 board

Shunnian Zhai — Tue, 12 Feb 2013 05:27:43 GMT

Hi,

Currently I am working on to bring up our custom DM8148 board. It failed to boot from SD, NAND and UART. UART continues to output "CCC...".

1) When I insert uSD card which includes our boot image files, UART "CCC..." output is stopped.

2) When I successfully transfer u-boot.min image through UART by using teraterm, UART "CCC..." output is also stopped.

From 1) or 2) above, it seems that RBL has detected a valid u-boot.min program from either SD or UART. Is it right? Not sure if RBL has loaded the u-boot.min and passed control to it?

After UART "CCC..." output is stopped, there are no any message from UART, even for U-BOOT version number.

Does anyone have any idea what is wrong here? Is it hardware or software related issue? Urgent. Pls advise!

Thanks in advance for your help!

Regards,

Shunnian

Need help !!! tvp5147 on dm8148

vico Tsui — Thu, 23 May 2013 01:38:20 GMT

Hi,

I need capture SD from TVP5147 on mistralsolutions dm8148-evm.

I try all patchs on this forum, and no one can work.

If somebody can help me, I will upload the right patch.

EZSDK: ezsdk_dm814x-evm_5_05_02_00_setuplinux

uboot args:

console=ttyO0,115200n8 mem=256M vram=50M ti814xfb.vram=0:16M,1:16M,2:6M noinitrd earlyprink notifyk.vpssm3_sv
a=0xBF900000 root=/dev/nfs nfsroot=192.168.55.11:/home/meegoo/install/nfsboot/filesys-dm814x-evm,proto=tcp,no
lock rw rootdelay=5 ip=192.168.55.30:192.168.55.11:192.168.55.1:255.255.255.0:dm814x:eth0:off

video in port is vin1A8~vin1A15

.ctrlChanSel = VPS_VIP_CTRL_CHAN_SEL_15_8

.video_capture_mode = VPS_CAPT_VIDEO_CAPTURE_MODE_SINGLE_CH_NON_MUX_EMBEDDED_SYNC,
.video_if_mode = VPS_CAPT_VIDEO_IF_MODE_8BIT,

.input_data_format = FVID2_DF_YUV422P,

I use v4l2 and the device is /dev/video5.

this is my kernel patch , apps. (Please visit the site to view this file)

DVRAPP / NVR / live555 applications on 8148EVM DVRRDK4.0

med29 — Tue, 14 May 2013 23:08:41 GMT

Hi,

I'm using the 8148EVM with the DVRRDK4.0. I like to create a H264 network video streaming application .

I noticed there is source code for the DVRAPP and NVR application for the 816x and 810x platforms.

is it possible to port the NVR application to the 8148 platform?

Is there any limitation that prevent the NVR application from running on the 8148 platform?

Thanks

Lots of JFFS2 errors when using NFS in DM385 IPNC

Ivy Liu — Mon, 13 May 2013 21:28:28 GMT

Hi All,

I want to use NFS in DM385 IPNC and I follow the Install guide to setup the bootargs.

It looks like that kernel can find the NFS server but then it shows lots of JFFS2 errors and is stuck.

"jffs2_scan_eraseblock(): Magic bitmask 0x1985 not found at 0x004c0000: 0x4255 instead".

Even when I forced it to use EXT2 rootfstype in bootargs, it still gives JFFS2 errors.

Is there any other settings that I need to change? Why it choose JFFS2 as NFS's system type?

How can I make DM385 IPNC work with NFS?

Thank you very much!

Ivy

What configurations are needed to get 8bit UYVY on display1 port of DM8148 ?

Jemish Patel — Sat, 20 Apr 2013 12:16:14 GMT

Hi,

We have DM8148 based customized board. Second is AM3505 based board. We are giving video output of DM8148 to AM3505 as video input. AM3505 requires 8bit BT656 video with embedded sync in UYVY pixel format (720x480 (NTSC)). In hardware we are using VOUT0_G_Y_YC2 to VOUT0_G_Y_YC9 for video output at DM8148. We are using ezsdk_dm814x-evm_5_05_01_04. In software we are using dispaly id 1. In software we configured display for (720 x 480(NTSC)) resolution. We made below configurations.

echo 0 > /sys/devices/platform/vpss/display1/enabled
echo 27027,1440/24/128/128,480/5/41/5,0 > /sys/devices/platform/vpss/display1/timings
echo 1 > /sys/devices/platform/vpss/display1/enabled

echo 0 > /sys/devices/platform/vpss/display1/enabled
echo single,yuv422spuv > /sys/devices/platform/vpss/display1/output
echo 1 > /sys/devices/platform/vpss/display1/enabled

With this settings we are able to get video on AM3505 board but we are not getting proper result. From output it seems that Cr is missing becasue we see the reddish image. For above configurations correct me if I am wrong.

For echo single,yuv422spuv > /sys/devices/platform/vpss/display1/output configuration why we can not configure display1 for UYVY interleaved format.

On DM8148 based board we have design VIDEO SOURCE->DECODER -->FPGA-->DM8148-->FPGA--->AM3505.

To simulate we generate pattern from FPGA with 8bit embedded sync in UYVY format and give it to AM3505 and it display it properly. So path from FPGA-->AM3505 is clear. And we are able to capture-->encode-->dump video and then play it so it plays properly. So there is no problem in capturing so VIDEO SOURCE->DECODER -->FPGA-->DM8148 path is also clear. We are not able to give proper format from DM8148-->FPGA. In short we required 8 bit NTSC resolution on display id1 in UYVY format. Can anyone please help us regarding this.

Regards,

Jemish

PLL doesn't lock

Hongfeng Wang — Mon, 20 May 2013 16:38:26 GMT

Previous version of our DM8148 board worked ok; recently we made some minor changes to the PCB, now the new PCB doesn't boot. Uboot is stuck at prcm_init()->pll_config(), the PLL status register read back never shows the PLL is locked. this happens on the configuration of audio PLL; if I comment out audio PLL configuration, it will get stuck on the next one.

the oscillator waveform looks normal. I also tried using crystal instead, still same problem.

I would appreciate everyone's input.

can I use the xds100 v2 emu on dm8127 ?

martin DONAGHY — Wed, 22 May 2013 15:01:05 GMT

can I use the xds100 v2 emu on dm8127 ?

HDMI issue

selvam mk — Thu, 16 May 2013 11:58:47 GMT

Hi all,

I'm using DM385 board with ti81xx-master kernel source.

when i try to run audio on hdmi it plays with error "clock: video0_dpll_ck failed transition to 'locked' Failed to configure adpll : unable to lock"

which also stops output on composite out.

aplay -Dhw:0,1 test.wav
Playing WAVE 'teWrapper disabled...
st.wav' : Signedclock: video0_dpll_ck failed transition to 'locked'
Failed to configure adpll : unable to lock
16 bit Little EWrapper Enabled...
ndian, Rate 44100 Hz, Stereo
Start audio transfer...

please help me to resolve this issue..

Regards,

Manoj

Encode_Display and Decode_Display

Yoel Cohen — Tue, 21 May 2013 11:40:40 GMT

Dear all,

I work on ezsdk_dm814x-evm_5_05_02_00, and I connect to RGB a stream from camera (http://www.aiptek.com.tw/c0_1.php?bid=2&cid=5&pid=1). I write the follow cmd in script file, to encode from camera to file and then immediately to decode from the file.

On the screen I see a clear view, but when I try to view the file in VLC, I see it not so clear, and when I decode the file, I see only an white screen in the middle of the screen.

please help me know why is it not working well, and what the solution.

The script is:

cd /etc/init.d/

./matrix-gui-e stop

/etc/init.d/pvr-init stop

echo 1:dvo2 > /sys/devices/platform/vpss/graphics0/nodes

echo 0 > /sys/devices/platform/vpss/display1/enabled

echo 720p-60 > /sys/devices/platform/vpss/display1/mode

echo 1 > /sys/devices/platform/vpss/display1/enabled

cd /usr/share/ti/ti-omx/

./capture_encode_a8host_debug.xv5T -f 60 -m 720p -b 6000000 -o test.h264 -n 600 -d 0

./decode_display_a8host_debug.xv5T -i test.h264 -w 1280 -h 720 -f 60 -g 0 -d 0 -c h264

regard,

Yoel

ALSA, Recording error EPIPE and “irq 14: nobody cared”

constantin ostrovsky — Wed, 22 May 2013 14:11:44 GMT

Hi,

We use TMDXEVM8148, Linux 2.6.37 and pnc_psp_04_04_00_02.

I’m trying to record PCM stream in format SND_PCM_FORMAT_S24_3BE ( signed 24 bits, big endian, 44100 frame rate). The function snd_pcm_readi() occasionally return the Error 32 (EPIPE). I tried to play with buffers size and implement changing according to http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/t/254728.aspx. Nothing helps. I receive about 22 errors for 15 minutes of recording. I tried to increase priority of recording task – number of error decreased to about 10, but a few times I got the error “irq 14: nobody cared”.

I tried both modes blocked and unblocked. The blocked mode looks more stable. In case of error I restore recording by snd_pcm_drop() and snd_pcm_prepare(), but I can hear that recording is corrupted.

Please, could someone give us any suggestion?

Best Regards,

Constantin

Use DSP to convert YUY2 to RGB

Steven Wu — Sat, 18 May 2013 18:13:20 GMT

I have a DM8148 with software EZSDK 5_05_02_00. As the project requirement, we need to capture video from web camera and display it on screen without gstreamer. The camera provides YUY2 format and the LCD display support only RGB. So, my solution is convert YUY2 to RGB. However, the convertion method takes high CPU load and it very slow when the video size getting higher.

After reading the documents from Codec Engine and Graphic SDK, it seems utilize DSP to do the convertion (YUY2->RGB) could be possible. Could someone tell me does the current Code Engine support this convertion? If no, can someone provide an example how to add a new algorithm to Codec engine?

Or, any other suggestion to improve the performance for the live camera video play?

Regards,

Steven

With DM8148 EzSDK DEI component Enable/Disable not taking effect after OMX state changed to IDLE

Hitesh Viradiya — Fri, 17 May 2013 10:44:07 GMT

Hello All,

I am using DM8148 EzSDK (ezsdk_dm814x-evm_5_05_01_04) with our custom board. I am able to run the capture_encode demo available with the package. OMX User-Guide (OMX_05_02_00_46_UserGuide.pdf) says that (refer Page No : 32) one can set Dynamic configuration using OMX_SetConfig open mac API. This OMX_SetConfig with OMX_TI_IndexConfigAlgEnable structure (De-interlacer algorithm enable/disable) is used in capture_encode application and it is working fine and OMX User-Guide also confirms the same (refer Page No: 33).

But when i tried setting the same after VFPC component goes to IDLE state, it is not taking any effect. It remains as it is it was before (LOADED state of component) changing the component to IDLE state.

Can anyone help me to come out of this issue ? I had a requirement in my application that i need to enable disable it at run-time.

Regards,

Hitesh

DM814x GStreamer OMX Encoding in MPEG2, MPEG4, MJPEG

Danny Cullen — Mon, 20 May 2013 10:31:53 GMT

Hi all,

I can get a gstreamer pipeline to capture using V4L2 and encode using the 'omx_h264enc' component. Can someone tell me if there are other GSTreamer OMX components to encode into MPEG2, MPEG4 or MJPEG? These encoding formats are all supported by the HDVICP2, I'm just wondering how I actually use them!?

Regards,

Danny Cullen

No activity on SDIO (MMC) Bus

ykfs yk — Thu, 09 May 2013 04:42:51 GMT

Hi,

Inspite of setting boot mode to MMC mode i.e. (BTMODE[4:0]: 10111) also tried (10011 and 00011), we are not able to boot from MMC. When probbed...there is no activity on MMC lines..not even single clock or CMD signal is geting asserted from DM814X..Checked continuity from CPU to MMC card with all pull up values are ok. we are getting CCCC chars and UART boot is happening..IS there any way we can read back boot mode registers thru UBOOT prompt. If yes, then we need to know how..

YKFS

problem about H264 encoder

zhou tianyou — Sun, 19 May 2013 16:19:15 GMT

I meet a problem.

I want to receive h264 on pc.

I use 8148 to capture and encode, then send the h264 data to vlc on pc.

The problem is I need to start vlc first , if not I can't see any video.

I find more infomation : If I can't see video on vlc, after I force a IDR frame, I can see video.

How can i solve the problem better?

Thanks.

Changes required to capture 4 stereo audio channels in DM8148

Jemish Patel — Tue, 07 May 2013 08:12:27 GMT

Hi,

We are using DM8148 based customized board in our project. We are able to capture single stereo channel perfectly. But when we try to capture four stereo channel we are not able to capture perfectly. We made below changes.

In board file :board-ti8148evm.c

static u8 ti8148_iis_serializer_direction[] = {
        RX_MODE,        RX_MODE,        RX_MODE,        RX_MODE,
        INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
        INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
        INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
};

In sound/soc/davinci/davinci-pcm.c file

In function

static void davinci_pcm_enqueue_dma(struct snd_pcm_substream *substream)
{

fifo_level = 4; /* Hard coded */

}

It capture audio but it not perfect. We are not able hear it . It's noisey. Can anyone suggest me if I am missing anything.

To avoid hard code I tried

.rxnumevt = 4 in board file .

But with this changes it give me an input/output error.

Reagads,

Jemish

[Uboot] How to stop autoboot when I wrongly set count = 0

Eason Wang — Tue, 21 May 2013 09:41:39 GMT

Hi,

I got a appro IPNC whose autoboot count number is 0, i am not able to operate under uboot prompt.

Is there any method to stop the autoboot? I saw some customers use their customized hot keys, do we have any such key by default?

BR,

Eason

ECPY DMA support on M3?

william calvert — Fri, 17 May 2013 15:27:43 GMT

Hi,

has anyone used the ECPY component on an DM814x M3 core?

I am using framework_components_3_22_01_07 from ezsdk but it seems like ECPY will only build for DSP targets (C674x).

is it possible to perform EDMA operations from the M3 VPSS core?

any help would be appreciated,

thanks.

Maximum allocated Memory Map on DM8148.

Vaibhav Dhingani — Tue, 21 May 2013 11:30:26 GMT

Hello falas,

Version: DVRRDK3.5 / DM8148 / Custom Board.

We want to use 1GB(512MB+512MB) DDR on DM8148 Platform.

DM81xx_DVR_RDK_Memory_Map.pdf says that Linux memory allocated can be 128M in 512MB build.

128MB is too small to us.

Can we adjust Linux Memory to 128MB + most of from 2nd 512MB DDR ??

Anyone can provide the reference memory map in DVRRDK 3.5 ?

Hi, uboot for Rev 3.0 issue

Paul Wang1 — Wed, 22 May 2013 08:46:52 GMT

Hi everybody,

In uboot code, we can see below the definition:

/* CPU Revision for TI81XX PG2.1 is 0x3 and PG1.0 is0 */

enum cpu_rev {

PG1_0 = 0,

PG1_1 = 1,

PG2_0 = 2,

PG2_1 = 3,

PG_END

};

but now, we are using Rev3.0, it seems stuck after

config_ti814x_ddr();

and before

ldr pc, _start_armboot @ jump to C code

even I force is_ddr() return 1, anybody can help me ?

RTSP receiver C-code help

ravikiran hv — Tue, 21 May 2013 14:32:57 GMT

Hi All,

HW: DM814x
SW: ipnc v3.2

I am streaming H264 encoded video over RTSP. VLC player able to receive this stream and play it properly.
But, I want to write a custom socket app, which can look into my port & ip of the board , receive data & dump to a File.

I wrote below code to achieve that. It successfully creates sockets, connects & then waits in receive from function without receiving any packets. I don have any clue WHY IT WAITS in recvfrom()? It will be great if some one can help me here.

/********************************************************** My udp scoket(receiver) code**********************************************************************/

/* Creates a datagram server. The port number is passed as an argument. This server runs forever */

#include <sys/types.h>
#include <sys/socket.h>
#include <netinet/in.h>
#include <arpa/inet.h>
#include <netdb.h>
#include <stdio.h>
#include <unistd.h> /* close() */
#include <string.h> /* memset() */
#include <stdlib.h>
#include<time.h>
#define SIZE_IN_BYTES 1500

/* This IP & port represents Ip & port of Board */
#define IPADDR "192.168.1.109"
#define PORT 8557

void error(char *msg)
{
perror(msg);
exit(0);
}

int main(int argc, char *argv[])
{
int sock, length, fromlen, n;
struct sockaddr_in server;
struct sockaddr_in from;
char buf[SIZE_IN_BYTES];//1500
static int count=0,frame=0;
static int inTime=0, outTime=0;
unsigned short disp;
int ret;

if (argc < 2)
{
   fprintf(stderr, "ERROR, no port provided\n");
   exit(0);
}
sock=socket(AF_INET, SOCK_STREAM, 0);
if (sock < 0)
{
   error("Opening socket");
}

int val=1;
int ret1=setsockopt(sock,SOL_SOCKET,SO_REUSEADDR,(const int *)(&val), sizeof val);
   if(ret1<0)
   {
       printf("ERR in set opt\n\n");
       exit(1);
   }

length = sizeof(server);
bzero(&server,length);
server.sin_family=AF_INET;
server.sin_port=htons(atoi(argv[1]));
if (inet_aton(IPADDR, &server.sin_addr)==0)
{
          fprintf(stderr, "inet_aton() failed\n");
          exit(1);
}

   if (connect(sock,(struct sockaddr *)&server,length)<0)
   {
       error("pathpartner connect: ");
   }

fromlen = sizeof(struct sockaddr_in);

    while (1)
   {
       n = recvfrom(sock,buf,SIZE_IN_BYTES,0,(struct sockaddr *)&from,&fromlen);
       if (n < 0)
       {
           error("recvfrom");
           exit(0);
       }
       else
       {
           frame++;
           printf("\nreceived data count=%d,frames=%d\n",count,frame);
       }

   }
}

Can not play video to HDMI 720p

Steve Tsai — Thu, 01 Nov 2012 03:34:50 GMT

When I modify load-hd-firmware in ezsdk to set the output to HDMI 720p, I can not play the testing video in matrix-gui. Does anyone have this issue also?

Here is the setting.

modprobe vpss sbufaddr=0xBFB00000 mode=hdmi:720pp-60 i2c_mode=1

DM8148: CPTS HW_TS_PUSH events not always causing TS_PEND interrupts

Delio Brignoli — Wed, 06 Feb 2013 17:22:09 GMT

Hello,

We have programmed DMTIMER4 to pulse HW1_TS_PUSH approximately 16 times per second and we are seeing events queued in the FIFO at the expected rate. However, we only get approximately 2 TS_PEND interrupts per second instead of the expected 16. Other CPTS interrupt sources (rollover, half-rollover, tx/rx packets) generate interrupts as expected. In the TRM, HW_PUSH events are not treated differently than other event sources and there should be a 1:1 correspondence between events and interrupts. Is this a known issue?

Thanks
--
Delio Brignoli
AudioScience Inc

How to load cramfs romfs from spi flash

wang danson — Fri, 03 May 2013 07:29:53 GMT

Now,I can boot my u-boot from spi flash,but why can't load cramfs romfs in the kernel? refered <TI81XX_PSP_McSPI_Driver_User_Guide.pdf>,I add some code as blow,

1.kernel configure

Device Drivers --->

[*] SPI support --->

<*> McSPI driver for OMAP24xx/OMAP34xx/TI81XX

Device Drivers --->

<*> Memory Technology Device (MTD) support --->

Self-contained MTD device drivers --->

<*> Support most SPI Flash chips (AT26DF, M25P, W25X, ...)

[*] Use FAST_READ OPCode allowing SPI CLK <= 50MHz (NEW)

File systems --->

[*] Miscellaneous filesystems --->

<*> Compressed ROM file system support (cramfs)

2.add code

board-ti8148ipnc.c

static struct mtd_partition ti8148_spi_partitions[] = {

{

.name = "romfs",

.offset = 0x00062000,

.size = 3998 * SZ_4K,

};

const struct flash_platform_data ti8148_spi_flash = {

.type = "w25q128",

.name = "spi_flash",

.parts = ti8148_spi_partitions,

.nr_parts = ARRAY_SIZE(ti8148_spi_partitions),

};

struct spi_board_info __initdata ti8148_spi_slave_info[] = {

{

.modalias = "m25p80",

.platform_data = &ti8148_spi_flash,

.irq = -1,

.max_speed_hz = 100000,

.bus_num = 1,

.chip_select = 0,

.mode = SPI_MODE_3,

};

m25p80.c

{ "m25p64", INFO(0x202017, 0, 64 * 1024, 128, 0) },

+ { "m25p128", INFO(0x202018, 0, 256 * 1024, 64, 0) },

error log out put

Net: Detected MACID:0:17:eb:57:85:2c

cpsw

Press CTRL-C to abort autoboot in 0 seconds=====>phy_init phy_id 0x4dd074

link up on port 0, speed 100, full duplex

Using cpsw device

TFTP from server 192.168.1.100; our IP address is 192.168.1.30

Filename 'uImage'.

Load address: 0x81000000

Loading: #################################################################

#################################################################

###################################################

done

Bytes transferred = 2255464 (226a68 hex)

## Booting kernel from Legacy Image at 81000000 ...

Image Name: Linux-2.6.37_DM8127_IPNC_3.20.00

Image Type: ARM Linux Kernel Image (uncompressed)

Data Size: 2255400 Bytes = 2.2 MiB

Load Address: 80008000

Entry Point: 80008000

Loading Kernel Image ... OK

Starting kernel ...

Uncompressing Linux... done, booting the kernel.

Linux version 2.6.37_DM8127_IPNC_3.20.00 (danson@IPNCServer) (gcc version 4.5.3 20110311 (prerelease) (GCC) ) #11 Fri May 3 15:24:56 CST 2013

CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c53c7f

CPU: VIPT nonaliasing data cache, VIPT aliasing instruction cache

Machine: ti8148ipnc

vram size = 4194304 at 0x0

ti81xx_reserve: ### Reserved DDR region @84f00000

reserved size = 4194304 at 0x0

FB: Reserving 4194304 bytes SDRAM for VRAM

Memory policy: ECC disabled, Data cache writeback

OMAP chip is TI8148 2.1

SRAM: Mapped pa 0x402f1000 to va 0xfe400000 size: 0xf000

Built 1 zonelists in Zone order, mobility grouping on. Total pages: 19040

Kernel command line: console=ttyO0,115200n8 mem=80M, console=ttyO0,115200n8 ip=192.168.1.38 netmask=255.255.0.0 noinitrd rw rootfstype=cramfs root=/dev/mtdblock0 cmemk.phys_start=0x85000000 cmemk.phys_end=0x89000000 cmemk.allowOverlap=1 earlyprint vram=4M notifyk.vpssm3_sva=0xBFD00000 ootwait=1 rw lpj=4997120

PID hash table entries: 512 (order: -1, 2048 bytes)

Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)

Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)

Memory: 74MB 1MB = 75MB total

Memory: 71124k/71124k available, 10796k reserved, 0K highmem

Virtual kernel memory layout:

vector : 0xffff0000 - 0xffff1000 ( 4 kB)

fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)

DMA : 0xffc00000 - 0xffe00000 ( 2 MB)

vmalloc : 0xc5800000 - 0xf8000000 ( 808 MB)

lowmem : 0xc0000000 - 0xc5000000 ( 80 MB)

pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)

modules : 0xbf000000 - 0xbfe00000 ( 14 MB)

.init : 0xc0008000 - 0xc003d000 ( 212 kB)

.text : 0xc003d000 - 0xc044a000 (4148 kB)

.data : 0xc044a000 - 0xc0483e80 ( 232 kB)

SLUB: Genslabs=11, HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1

NR_IRQS:375

IRQ: Found an INTC at 0xfa200000 (revision 5.0) with 128 interrupts

Total of 128 interrupts on 1 active controller

GPMC revision 6.0

Trying to install interrupt handler for IRQ368

Trying to install interrupt handler for IRQ369

Trying to install interrupt handler for IRQ370

Trying to install interrupt handler for IRQ371

Trying to install interrupt handler for IRQ372

Trying to install interrupt handler for IRQ373

Trying to install interrupt handler for IRQ374

Trying to install type control for IRQ375

Trying to set irq flags for IRQ375

OMAP clockevent source: GPTIMER1 at 20000000 Hz

Console: colour dummy device 80x30

Calibrating delay loop (skipped) preset value.. 999.42 BogoMIPS (lpj=4997120)

pid_max: default: 32768 minimum: 301

Security Framework initialized

Mount-cache hash table entries: 512

CPU: Testing write buffer coherency: ok

devtmpfs: initialized

TI81XX: Map 0x84f00000 to 0xfe500000 for dram barrier

TI81XX: Map 0x40300000 to 0xfe600000 for sram barrier

omap_voltage_early_init: voltage driver support not added

regulator: core version 0.5

regulator: dummy:

NET: Registered protocol family 16

omap_voltage_domain_lookup: Voltage driver init not yet happened.Faulting!

omap_voltage_add_dev: VDD specified does not exist!

OMAP GPIO hardware version 0.1

omap_mux_init: Add partition: #1: core, flags: 4

_omap_mux_init_gpio: Could not set gpio79

_omap_mux_init_gpio: Could not set gpio80

Cannot clk_get ck_32

Debugfs: Only enabling/disabling deep sleep and wakeup timer is supported now

registered ti81xx_vpss device

registered ti81xx on-chip HDMI device

registered ti81xx_fb device

PWM0 init success.

PWM1 init success.

bio: create slab <bio-0> at 0

SCSI subsystem initialized

USBSS revision 4ea2080b

registerd cppi-dma Intr @ IRQ 17

Cppi41 Init Done

omap_i2c omap_i2c.1: bus 1 rev4.0 at 100 kHz

tps65910 1-002d: read from reg 3f failed

tps65910 1-002d: read from reg 1e failed

set_machine_constraints: failed to enable VRTC

tps65910 1-002d: failed to register tps65910-pmic regulator

tps65910-pmic: probe of tps65910-pmic failed with error -121

tps65911-rtc tps65911-rtc: rtc core: registered tps65911-rtc as rtc0

tps65910 1-002d: No interrupt support, no core IRQ

Advanced Linux Sound Architecture Driver Version 1.0.23.

Switching to clocksource gp timer

musb-hdrc: version 6.0, peripheral, debug=0

musb-hdrc musb-hdrc.0: dma type: dma-cppi41

MUSB controller-0 revision 4ea20800

usb2phy: computed values rxcalib(15)DACs(26 12 13)

usb2phy: override computed values rxcalib(15)DACs(26 12 13)

usb2phy_config: musb(0) rxcalib done, rxcalib read value 6f6d596e

musb-hdrc musb-hdrc.0: USB Peripheral mode controller at c581e000 using DMA, IRQ 18

NET: Registered protocol family 2

IP route cache hash table entries: 1024 (order: 0, 4096 bytes)

TCP established hash table entries: 4096 (order: 3, 32768 bytes)

TCP bind hash table entries: 4096 (order: 2, 16384 bytes)

TCP: Hash tables configured (established 4096 bind 4096)

TCP reno registered

UDP hash table entries: 256 (order: 0, 4096 bytes)

UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)

NET: Registered protocol family 1

RPC: Registered udp transport module.

RPC: Registered tcp transport module.

RPC: Registered tcp NFSv4.1 backchannel transport module.

NetWinder Floating Point Emulator V0.97 (double precision)

PMU: registered new PMU device of type 0

omap-iommu omap-iommu.0: ducati registered

omap-iommu omap-iommu.1: sys registered

JFFS2 version 2.2. (NAND) 漏 2001-2006 Red Hat, Inc.

msgmni has been set to 138

io scheduler noop registered

io scheduler deadline registered

io scheduler cfq registered (default)

CMEMK module: built on May 3 2013 at 13:05:45

Reference Linux version 2.6.37

File /home/danson/work/olddisk/puwell/sdk/ipnc/GA_Release_3.2.0.1/Source/ti_tools/linuxutils_3_22_00_02/packages/ti/sdo/linuxutils/cmem/src/module/cmemk.c

allocated heap buffer 0xc7000000 of size 0x4000000

cmemk initialized

Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled

omap_uart.0: ttyO0 at MMIO 0x48020000 (irq = 72) is a OMAP UART0

console [ttyO0] enabled

omap_uart.1: ttyO1 at MMIO 0x48022000 (irq = 73) is a OMAP UART1

omap_uart.2: ttyO2 at MMIO 0x48024000 (irq = 74) is a OMAP UART2

omap_uart.3: ttyO3 at MMIO 0x481a6000 (irq = 44) is a OMAP UART3

omap_uart.4: ttyO4 at MMIO 0x481a8000 (irq = 45) is a OMAP UART4

omap_uart.5: ttyO5 at MMIO 0x481aa000 (irq = 46) is a OMAP UART5

brd: module loaded

loop: module loaded

No recognised DiskOnChip devices found

m25p80 spi1.0: w25q128 (16384 Kbytes)

Creating 1 MTD partitions on "spi_flash":

0x000000062000-0x000001000000 : "romfs"

davinci_mdio davinci_mdio.0: davinci mdio revision 1.6

davinci_mdio davinci_mdio.0: detected phy mask fffffffe

davinci_mdio.0: probed

davinci_mdio davinci_mdio.0: phy[0]: device 0:00, driver unknown

mice: PS/2 mouse device common for all mice

i2c /dev entries driver

Linux video capture interface: v2.00

OMAP Watchdog Timer Rev 0x00: initial timeout 60 sec

notify_init : notify drivercreated for remote proc id 2 at physical Address 0xbfd00000

ALSA device list:

No soundcards found.

TCP cubic registered

NET: Registered protocol family 17

Registering the dns_resolver key type

VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3

omap_voltage_late_init: Voltage driver support not added

Power Management for TI81XX.

Detected MACID=0:17:eb:57:85:2c

tps65911-rtc tps65911-rtc: hctosys: unable to read the hardware clock

CPSW phy found : id is : 0x4dd074

PHY 0:01 not found

IP-Config: Guessing netmask 255.255.255.0

IP-Config: Complete:

device=eth0, addr=192.168.1.38, mask=255.255.255.0, gw=255.255.255.255,

host=192.168.1.38, domain=, nis-domain=(none),

bootserver=255.255.255.255, rootserver=255.255.255.255, rootpath=

PHY: 0:00 - Link is Up - 100/Full

List of all partitions:

1f00 15992 mtdblock0 (driver?)

No filesystem could mount root, tried: cramfs

Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(31,0)

Backtrace:

[<c004af70>] (dump_backtrace+0x0/0x110) from [<c033c18c>] (dump_stack+0x18/0x1c)

r6:00008000 r5:c4414007 r4:c04849d8 r3:60000013

[<c033c174>] (dump_stack+0x0/0x1c) from [<c033c1ec>] (panic+0x5c/0x178)

[<c033c190>] (panic+0x0/0x178) from [<c0009184>] (mount_block_root+0x1c4/0x204)

r3:00000000 r2:00000020 r1:c4425f58 r0:c03de095

r7:c03de0f9

[<c0008fc0>] (mount_block_root+0x0/0x204) from [<c0009358>] (mount_root+0xac/0xcc)

[<c00092ac>] (mount_root+0x0/0xcc) from [<c00094e4>] (prepare_namespace+0x16c/0x1cc)

r4:c0483ee4

[<c0009378>] (prepare_namespace+0x0/0x1cc) from [<c0008d70>] (kernel_init+0x114/0x154)

r5:c002bbfc r4:c002bbfc

[<c0008c5c>] (kernel_init+0x0/0x154) from [<c0071eb4>] (do_exit+0x0/0x5d0)

r5:c0008c5c r4:00000000

TI PN TMS320DM8148CCYEA2?

Bonzai — Fri, 03 May 2013 16:56:26 GMT

Hi all,

I just want to know when will this part number TMS320DM8148CCYEA2 be available?

thanks,

bonzai