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TI Home » TI E2E Community » Support Forums » Digital Signal Processors (DSP) » DaVinci™ Video Processors » DM814x and AM387x Processors Forum » Register read problem on CortexM3 cores
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Register read problem on CortexM3 cores

Register read problem on CortexM3 cores

This question is answered
Karsten
Posted by Karsten
on Apr 13 2012 16:27 PM
Prodigy155 points

Hi,

I am trying to read some registers on the Cortex M3 ISS core in a DM8147 using CCS 5 so I have created a GEL file to do this.

When I connect to the Cortex M3 ISS and load my GEL file then it doesn't seem to be possible to read the register values. All my 32-bit register reads returns the value 0xBAD0BAD0.

Here is a couple of lines that illustrate what I am trying to do:

    #define ISS_ISP5_SYS1_BASE_ADDR        0x52010000

    #define ISP5_REVISION            (ISS_ISP5_SYS1_BASE_ADDR + 0x0000)
    #define ISP5_HWINFO1            (ISS_ISP5_SYS1_BASE_ADDR + 0x0004)
    #define ISP5_HWINFO2            (ISS_ISP5_SYS1_BASE_ADDR + 0x0008)
    #define ISP5_SYSCONFIG            (ISS_ISP5_SYS1_BASE_ADDR + 0x0010)

    #define ISP5_CTRL            (ISS_ISP5_SYS1_BASE_ADDR + 0x006C)
    #define ISP5_PG                (ISS_ISP5_SYS1_BASE_ADDR + 0x0070)
    #define ISP5_PG_PULSE_CTRL        (ISS_ISP5_SYS1_BASE_ADDR + 0x0074)
    #define ISP5_PG_FRAME_SIZE        (ISS_ISP5_SYS1_BASE_ADDR + 0x0078)

    hotmenu ISS_READ_PG_SETTINGS()
    {
        GEL_TextOut("\t ****  Reading ISS PG in progress......... \n","Output",1,1,1);
        GEL_TextOut("Read ISP5_CTRL addr %x=%x\n",,,,,ISP5_CTRL,RD_MEM_32(ISP5_CTRL));
        GEL_TextOut("Read ISP5_PG %x\n",,,,,RD_MEM_32(ISP5_PG));
        GEL_TextOut("Read ISP5_PG_PULSE_CTRL %x\n",,,,,RD_MEM_32(ISP5_PG_PULSE_CTRL));
        GEL_TextOut("Read ISP5_PG_FRAME_SIZE %x\n",,,,,RD_MEM_32(ISP5_PG_FRAME_SIZE));
        GEL_TextOut("\t ****  Reading ISS PG is DONE **** \n","Output",1,1,1);    
    }

I then get the following output:

Cortex_M3_ISS: Output:      ****  Reading ISS PG in progress.........
Cortex_M3_ISS: GEL Output: Read ISP5_CTRL addr 0x5201006C=0xBAD0BAD0
Cortex_M3_ISS: GEL Output: Read ISP5_PG 0xBAD0BAD0
Cortex_M3_ISS: GEL Output: Read ISP5_PG_PULSE_CTRL 0xBAD0BAD0
Cortex_M3_ISS: GEL Output: Read ISP5_PG_FRAME_SIZE 0xBAD0BAD0
Cortex_M3_ISS: Output:      ****  Reading ISS PG is DONE ****

What am I doing wrong here?

Best regards,

Karsten

DM8147 DM8148 ISS DM8148 JTAG M3 DaVinci 814x
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  • Anil
    Posted by Anil
    on Apr 15 2012 01:39 AM
    Verified Answer
    Verified by Karsten
    Expert6655 points

    Hi Karsten,

    Can you refer this post?

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/p/180929/652728.aspx#652728

    Regards

    AnilKumar

    Please mark this Forum post as answered via the Verify Answer button below if it helps answer your question.  Thanks!

    dm8148 psp iss
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  • Karsten
    Posted by Karsten
    on Apr 15 2012 11:27 AM
    Prodigy155 points
    Hi AnilKumar, Thanks. It was the base address that was wrong since I was accessing the registers directly from the Cortex M3 via the interconnect Best regards, Karsten
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