DM8127 u-boot problem

Hi!

 

The exact same thing happened to me: trying to upgrade u-boot from 2.8.0  via tftp from u-boot --> camer print CCCC

The only difference is I did not forget memory initialization.

Khan, were you able to recover u-boot? 

I was able to boot ubl over UART with minicom. I uploaded u-boot as well, but when I try to load it, it hangs.

This is what I do, and what I get:

 

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
TI-MIN#go 0x81000000
## Starting application at 0x81000000 ...


U-Boot 2010.06 (May 29 2012 - 16:19:17)

TI8148-GP rev 2.1

ARM clk: 600MHz
DDR clk: 400MHz
L3 clk: 200MHz
IVA clk: 450MHz
ISS clk: 400MHz
DSP clk: 500MHz
DSS clk: 200MHz

I2C: ready
DRAM: 2 GiB
NAND: HW ECC BCH8 Selected
256 MiB
MMC: OMAP SD/MMC: 0

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 

 System hangs here.

What could be the problem?

Thanks in advance! 

--

 

Hi 

I followed the update.txt. I can updated U-boot but I can not mount the NFS.

that is what happen to me.

thanks

Hi,

We are using DM8127. I uploaded u-boot as well, but when I try to load it, it hangs u-boot on DM8127. CPSW register function call hanges . no console is available. See below log for  DM8127. & check also SP is 0x0000000 using JATG

ARM clk: 600MHz
DDR clk: 533MHz
L3 clk:  200MHz
IVA clk: 450MHz
ISS clk: 400MHz
DSP Default OFF
DSS Default OFF

I2C:   ready
DRAM:  512 MiB
DCACHE:  On
NAND:  HW ECC BCH8 Selected
NAND device: Manufacturer ID: 0x2c, Chip ID: 0xdc (Micron NAND 512MiB 3,3V 8-bit)
NAND bus width 16 instead 8 bit
No NAND device found!!!
0 MiB
MMC:   OMAP SD/MMC: 0, ON-BOARD SDIO: 1
*** Warning - bad CRC or NAND, using default environment

Net:   <ethaddr> not set. Reading from E-fuse
Detected MACID:84:7e:40:fa:fc:a2

Hi Tejas Patil,

tejas patil said:

We are using DM8127

Is this DM8127 TI EVM or DM8127 custom board?

tejas patil said:

 I uploaded u-boot as well, but when I try to load it, it hangs u-boot on DM8127.

How you built your u-boot? How you load your u-boot (UART, MMC/SD, etc)?

tejas patil said:

CPSW register function call hanges

tejas patil said:

Detected MACID:84:7e:40:fa:fc:a2

Have you made some modifications in the u-boot source code?

Regards,
Pavel

Hi pavel,

1) DM8127 custom board

2)  make CROSS_COMPILE=arm-arago-linux-gnueabi- ARCH=arm ti8148_ipnc_min_uart (Base code for U-Boot RDK IPNC_RDK_V3.8.0.tar.gz for DM8127 SoC)

3) No modification done in u-boot .

Regards,
Tejas patil

Tejas,

tejas patil said:

1) DM8127 custom board

Do you have ethernet hardware in your custom board (like we have in the TI EVM)? Do you have ethernet PHY? If yes, is it the same as in the TI EVM?

tejas patil said:

2)  make CROSS_COMPILE=arm-arago-linux-gnueabi- ARCH=arm ti8148_ipnc_min_uart (Base code for U-Boot RDK IPNC_RDK_V3.8.0.tar.gz for DM8127 SoC)

Are you building just the 1st stage bootloader (u-boot.min.uart)? When I load/start just the 1st stage bootloader in DM814x TI EVM, I have:

U-Boot 2010.06 (Nov 04 2014 - 17:04:35)

TI8148-GP rev 2.1

ARM clk: 600MHz
DDR clk: 400MHz

DRAM:  1 GiB
DCACHE:  Off
Using default environment

The 2nd stage U-Boot will now be auto-loaded
Please do not interrupt the countdown till TI8148_EVM prompt if 2nd stage is already flashed
Hit any key to stop autoboot:  0
TI-MIN#


Then I build my 2nd stage bootloader (u-boot.bin) and when load/start I have:

TI-MIN#go 0x80008000
## Starting application at 0x80008000 ...


U-Boot 2010.06 (Nov 04 2014 - 17:05:28)

TI8148-GP rev 2.1

ARM clk: 600MHz
DDR clk: 400MHz

I2C:   ready
DRAM:  1 GiB
DCACHE:  On
NAND:  HW ECC BCH8 Selected
256 MiB
MMC:   OMAP SD/MMC: 0
*** Warning - bad CRC or NAND, using default environment

                          .:;rrr;;.                   
                    ,5#@@@@#####@@@@@@#2,             
                 ,A@@@hi;;;r5;;;;r;rrSG@@@A,          
               r@@#i;:;s222hG;rrsrrrrrr;ri#@@r        
             :@@hr:r;SG3ssrr2r;rrsrsrsrsrr;rh@@:      
            B@H;;rr;3Hs;rrr;sr;;rrsrsrsrsrsr;;H@B     
           @@s:rrs;5#;;rrrr;r#@H:;;rrsrsrsrsrr:s@@    
          @@;;srs&X#9;r;r;;,2@@@rrr:;;rrsrsrsrr;;@@   
         @@;;rrsrrs@MB#@@@@@###@@@@@@#rsrsrsrsrr;;@@  
        G@r;rrsrsr;#X;SX25Ss#@@#M@#9H9rrsrsrsrsrs;r@G
        @9:srsrsrs;2@;:;;:.X@@@@@H::;rrsrsrsrsrsrr:3@
       X@;rrsrsrsrr;XAi;;:&@@#@Bs:rrsrsrsrsrsrsrsrr;@X
       @#;rsrsrsrsrr;r2ir@@@###::rrsrsrsrsrsrsrsrsr:@@
       @A:rrsrsrsrr;:2@29@@M@@@;:;rrrrsrsrsrsrsrsrs;H@
       @&;rsrsrsrr;A@@@@@@###@@@s::;:;;rrsrsrsrsrsr;G@
       @#:rrsrsrsr;G@5Hr25@@@#@@@#9XG9s:rrrrsrsrsrs:#@
       M@;rsrsrsrs;r@&#;::S@@@@@@@M@@@@Grr:;rsrsrsr;@#
       :@s;rsrsrsrr:M#Msrr;;&#@@@@@@@@@@H@@5;rsrsr;s@,
        @@:rrsrsrsr;S@rrrsr;:;r3MH@@#@M5,S@@irrsrr:@@
         @A:rrsrsrsrrrrrsrsrrr;::;@##@r:;rH@h;srr:H@  
         ;@9:rrsrsrsrrrsrsrsrsr;,S@Hi@i:;s;MX;rr:h@;  
          r@B:rrrrsrsrsrsrsrr;;sA@#i,i@h;r;S5;r:H@r   
           ,@@r;rrrsrsrsrsrr;2BM3r:;r:G@:rrr;;r@@,    
             B@Mr;rrrrsrsrsr@@S;;;rrr:5M;rr;rM@H      
              .@@@i;;rrrrsrs2i;rrrrr;r@M:;i@@@.       
                .A@@#5r;;;r;;;rrr;r:r#AsM@@H.         
                   ;&@@@@MhXS5i5SX9B@@@@G;            
                       :ihM#@@@@@##hs,                

Net:   <ethaddr> not set. Reading from E-fuse
Detected MACID:90:d7:eb:d5:13:96
cpsw
Hit any key to stop autoboot:  0
TI8148_EVM#


Please provide more details about you boot source (UART, MMC/SD, NAND, etc).

tejas patil said:

3) No modification done in u-boot .

Can you try comment/disable the cpsw_eth_set_mac_addr(mac_addr) function:

u-boot/board/ti/<ti8127 ipnc>/evm.c

int board_eth_init(bd_t *bis)
{

if(is_valid_ether_addr(mac_addr)) {
        printf("Detected MACID:%x:%x:%x:%x:%x:%x\n",mac_addr[0],
            mac_addr[1], mac_addr[2], mac_addr[3],
            mac_addr[4], mac_addr[5]);
      //  cpsw_eth_set_mac_addr(mac_addr);  ---> comment here

Thus we will be sure your code stuck in this function.

Best regards,
Pavel

Hi pavel,

i was //  cpsw_eth_set_mac_addr(mac_addr);  ---> comment here but till it hanges it is hanges in

return cpsw_register(&cpsw_data);

Best regards,

Tejas

Pavel Botev said:

Do you have ethernet hardware in your custom board (like we have in the TI EVM)? Do you have ethernet PHY? If yes, is it the same as in the TI EVM?

Pavel Botev said:

Are you building just the 1st stage bootloader (u-boot.min.uart)?

Pavel Botev said:

Please provide more details about you boot source (UART, MMC/SD, NAND, etc).

Hi pavel

Tejas,

tejas patil said:

i was //  cpsw_eth_set_mac_addr(mac_addr);  ---> comment here but till it hanges it is hanges in

return cpsw_register(&cpsw_data);

Can you try the above modification:

//return cpsw_register(&cpsw_data);
return 1;

}

After this change, will your u-boot hang or load up successful (even without cpsw support)?

BR
Pavel

Hi pavel,

Boot log after return 1 load up successful but without cpsw support.

Phy1 Reset initialized
Net:   <ethaddr> not set. Reading from E-fuse
Detected MACID:d0:39:72:67:4a:ec
No ethernet found. Enter stop in 3 seconds to stop autoboot

BR

Tejas

Tejas,

tejas patil said:

1.Do you have ethernet hardware in your custom board (like we have in the TI EVM)? Do you have ethernet PHY? If yes, is it the same as in the TI EVM?

 

-Yes but not same as TI EVM. ETherent PHY is different KSZ9031 PHY. RGMII  mode is used.

The DM814x/DM811x TI EVMs has AR8031 PHYs, working in RGMII mode. So RGMII mode should no be the problem. Please see the below pointers regarding using different ethernet PHY:

http://processors.wiki.ti.com/index.php/TI81xx_PSP_Porting_Guide#Ethernet_Driver_-_Adding_Custom_Ethernet_Phy

http://e2e.ti.com/support/embedded/linux/f/354/t/218006.aspx

http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/t/209865.aspx

http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/t/349885.aspx

http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/t/358952.aspx

I can also suggest you to try with the latest u-boot code base:

http://arago-project.org/git/projects/?p=u-boot-ipnc-rdk-dm81xx.git;a=shortlog;h=refs/heads/ipncrdk_psp_dm81xx_uboot

BR
Pavel

Tejas,

tejas patil said:

Boot log after return 1 load up successful but without cpsw support.

Can you try explore the u-boot/drivers/net/cpsw.c cpsw_register() function:

int cpsw_register(struct cpsw_platform_data *data)
{
    struct cpsw_priv    *priv;
    void            *regs = (void *)data->cpsw_base;
    struct eth_device    *dev;

    dev = malloc(sizeof(*dev));
    if (!dev)
        return -ENOMEM;
    memset(dev, 0, sizeof(*dev));

    priv = malloc(sizeof(*priv));
    if (!priv) {
        free(dev);
        return -ENOMEM;
    }
    memset(priv, 0, sizeof(*priv));

    priv->data = *data;
    priv->dev  = dev;

    priv->slaves = malloc(sizeof(struct cpsw_slave) * data->slaves);
    if (!priv->slaves) {
        free(dev);
        free(priv);
        return -ENOMEM;
    }

    priv->host_port         = data->host_port_num;
    priv->regs        = regs;
    priv->host_port_regs    = regs + data->host_port_reg_ofs;
    priv->dma_regs        = regs + data->cpdma_reg_ofs;
    priv->dma_sram_regs    = regs + data->cpdma_sram_ofs;
    priv->ale_regs        = regs + data->ale_reg_ofs;
    priv->descs        = regs + data->bd_ram_ofs;

    for_each_slave(priv, cpsw_slave_setup, idx, priv);

    strcpy(dev->name, "cpsw");
    dev->iobase    = 0;
    dev->init    = cpsw_init;
    dev->halt    = cpsw_halt;
    dev->send    = cpsw_send;
    dev->recv    = cpsw_recv;
    dev->priv    = priv;

    eth_register(dev);

    cpsw_mdio_init(dev->name, data->mdio_base, data->mdio_div);

    return 1;
}

Can you put printf statements and see where exactly your flow stuck (in eth_register(dev), or in cpsw_mdio_init() or else).

BR
Pavel

Hi pavel,

It is hangs in cpsw_mdio_init(dev->name, data->mdio_base, data->mdio_div); function

below function is hangs after this commented cpsw is register .

        /* set enable and clock divider */
 __raw_writel(div | CONTROL_ENABLE, &mdio_regs->control); and dhcp & tftpboot command is not working

Net:   <ethaddr> not set. Reading from E-fuse
Detected MACID:d0:39:72:67:4a:ec
cpsw
Hit any key to stop autoboot:  0
TI8148_IPNC#
TI8148_IPNC#dhcp

no print at output at dhcp command is used

BR

Tejas

Tejas,

tejas patil said:

It is hangs in cpsw_mdio_init(dev->name, data->mdio_base, data->mdio_div); function

below function is hangs after this commented cpsw is register .

        /* set enable and clock divider */
 __raw_writel(div | CONTROL_ENABLE, &mdio_regs->control); and dhcp & tftpboot command is not working

This line is trying to enable the MDIO:

MDIO CONTROL[30] ENABLE = 1 - Enable control.  Enable the MDIO state machine.

Can you check if you can access (read/write) the MDIO registers at all? You can put one printf like below:

static void cpsw_mdio_init(char *name, u32 mdio_base, u32 div)
{
    mdio_regs = (struct cpsw_mdio_regs *)mdio_base;
    
    printf("mdio_regs->control = %x\n",__raw_readl(0x4A100804));

    /* set enable and clock divider */
    __raw_writel(div | CONTROL_ENABLE, &mdio_regs->control);

The when loading u-boot, you should have:

Net:   <ethaddr> not set. Reading from E-fuse
Detected MACID:90:d7:eb:d5:13:96
mdio_regs->control = 810000ff

Hi pavel,

mdio_regs->control = 810000ff
Ethernet is working ok .thank you pavel

BR

tejas

Tejas,

tejas patil said:

printf("mdio_regs->control = %x\n",__raw_readl(0x4A100804)); read it is hangs in this function also.

In order to be able to access (read/write) the MDIO registers (starting from address 0x4A100800) you should enable the clock signals:

TRM, chapter 3PSW Ethernet Subsystem (EMAC)

9.3.4 Initialization and Configuration of CPSW
To configure the 3PSW Ethernet Subsystem for operation the host must perform the following:
1. Select the Interface (G/MII, RGMII, RMII) Mode
2. Configure pads (PIN muxing), as per the interface selected.
3. Enable the 3PSW Ethernet Subsystem Clocks
4. Configure the PRCM registers CM_ETHERNET_CLKSTCTRL, CM_ALWON_ETHERNET_0_CLKCTRL to enable power and clocks to 3PSW Ethernet Subsystem
5. ....

Let me check step 4. Could you print the PRCM registers value:

static void cpsw_mdio_init(char *name, u32 mdio_base, u32 div)
{
    mdio_regs = (struct cpsw_mdio_regs *)mdio_base;
   
    printf("CM_ETHERNET_CLKSTCTRL = %x\n",__raw_readl(0x48181404));
    printf("CM_ALWON_ETHERNET_0_CLKCTRL = %x\n",__raw_readl(0x481815D4));

    /* set enable and clock divider */
    __raw_writel(div | CONTROL_ENABLE, &mdio_regs->control);

When load the new u-boot, I have:

Net:   <ethaddr> not set. Reading from E-fuse
Detected MACID:90:d7:eb:d5:13:96
CM_ETHERNET_CLKSTCTRL = 302
CM_ALWON_ETHERNET_0_CLKCTRL = 2
cpsw

BR
Pavel

Hi pavel,

Thank's. Ethernet is working ok

BR

Tejas

Tejas,

tejas patil said:

Thank's. Ethernet is working ok

Do you mean that your u-boot no more stuck and register cpsw successful?

BR
Pavel

Hi pavel,

Yes , register cpsw successful .

BR

Tejas

Tejas,

Could you please share, in short, what was the root cause, was it the value in PRCM registers?

BR
Pavel

Hi pavel,

Hi,

I am using DM8127 custom board. I am using UART1 port loop back  ttyO1

echo "Hello" > /dev/ttyO1;cat /dev/ttyO1 nothing on output ??

BR

Tejas

Tejas,

tejas patil said:

Hi,

I am using DM8127 custom board. I am using UART1 port loop back  ttyO1

echo "Hello" > /dev/ttyO1;cat /dev/ttyO1 nothing on output ??

Please open new thread for questions not related to the current e2e thread.

BR